www.austriamicrosystems.com/Interfaces-LVDS/AS1160_61

Revision 1.01

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AS1160/AS1161

Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s

6 Electrical Characteristics

Serializer Electrical Characteristics

Serializer Timing Requirements for TCLK

Serializer Switching Characteristics

Table 4. Electrical Characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Serializer LVCMOS/LVTTL DC Specifications (pins DINx, TCLK, PWDNN, TCKR/FN, SYNC1, SYNC2, DEN)

High Level Input Voltage

2.0

V

Low Level Input Voltage

GND

0.8

V

Input Current

-1

+1

µA

Serializer Bus LVDS DC Specifications (pins DO+ and DO-)

Output Differential Voltage

(DO+ to DO-)

Figure 34 on page 18

200

360

mV

Output Differential Voltage

Unbalance

1

35

mV

Offset Voltage

1.1

1.2

1.3

V

Offset Voltage Unbalance

2

35

mV

Output Short-Circuit

Current

DO = 0V, DIN = High,

-13

-20

mA

Tri-State Output Current

-1

+1

µA

Power-Off Output Current

DO = 0V or 3.6V

-1

+1

µA

Serializer Supply Current (pins DVDD and AVDD)

Serializer Supply Current

(Worst Case) ICC-Pattern

Figure 16 on page 12

f = 20MHz

35

50

mA

f = 66MHz

70

90

Serializer Supply Current

(Powerdown)

400

700

µA

Table 5. Serializer Timing Requirements for TCLK

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Transmit Clock Freq.

Figure 20 on page 13

20

66

MHz

Transmit Clock Period

15.15

50

ns

Transmit Clock Duty Cycle

40

60

%

TCLK Input Transition Time

3

6

ns

TCLK Input Jitter

150

ps

(RMS)

Table 6. Serializer Switching Characteristics

1

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Bus LVDS Low-to-High

Transition Time

Figure 18 on page 13

0.25

0.4

ns

Bus LVDS High-to-Low

Transition Time

0.25

0.4

ns