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AS1160 数据表(PDF) 15 Page - ams AG

部件名 AS1160
功能描述  20MHz - 66MHz, 10-Bit Bus, IEEE 1149.1 (JTAG) Compliant LVDS Serializer/Deserializer
PDF  29 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS1160 数据表(HTML) 15 Page - ams AG

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www.austriamicrosystems.com/Interfaces-LVDS/AS1160_61
Revision 1.01
15 - 29
AS1160/AS1161
Datasheet - Ti m i n g D i a g r a m s
Figure 25. SYNC Timing Delays
Figure 26. Serializer Delay
REN
tSPW
tSPW minimum timing met
Data
SYNCPAT
SYNCPAT
Data
DO+
DO-
SYNC1
or
SYNC2
TCLK
SYNC1
or
SYNC2
PWDNN
TCLK
DO+
DO-
11111
00000
SYNCPAT
SYNCPAT
tSD
Timing shown for TCKR/FN = high
Start
Bit
Start
Bit
Stop
Bit
Stop
Bit
DIN0:9 Symbol n + 1
DIN0:9 Symbol n
DOUT0:9 Symbol n - 1
DOUT0:9 Symbol n
TCLK
DIN
DO-
DO+
0
1
2
9
8
DIN0:9 Symbol n + 2
tTCP
Start
Bit
DOUT0:9 Symbol n + 1
0
1
2
9
8
0
1
2



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