XTNETA1622DW datasheet(23/68 Pages) TI1

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TNETA1570

ATM SEGMENTATION AND REASSEMBLY DEVICE

WITH INTEGRATED 64BIT PCIHOST INTERFACE

SDNS033B − JUNE 1995 − REVISED MAY 1996

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

PRINCIPLES OF OPERATION

reassembly overview (continued)

If the VPI is on, the DMA entry is enabled, the wait on EOP is cleared, the VCI is in range, and the TNETA1570

owns the free buffer, the TNETA1570 begins the reassembly process for the incoming cell.

Word 0 of the free-buffer descriptor is copied to word 2 of the DMA state table entry to get the start-buffer

address. If the receive free-buffer rings are used, the lower 16 bits of word 3 in the state table, the current

data-byte count, is copied from word 1 of the appropriate receive free-buffer ring-pointer entry. If the receive

free-buffer FIFO is used, the lower 16 bits of word 3 in the state table are copied from the FIFO free-buffer-size

of the first buffer in the packet. When this is completed, transfer of the cell to host memory occurs.

The current-data-byte count is decremented by one for each cell transmitted to the host. If the current-data-byte

count reaches zero and an EOP has not yet arrived, a new buffer is fetched either from the free-buffer ring or

the FIFO.

The TNETA1570 can be configured to reassemble either AAL5 or transparent-AAL packets. Whether a DMA

state table entry performs AAL5, PTI-based-transparent AAL, or counter-based-transparent AAL, processing

is set by the host at initialization. If the cell belongs to an AAL5 packet, the CRC value is calculated and the trailer

is extracted and posted in the completion ring. Incoming VC-level OAM cells are reserved for DMA channels

0 and 1. VP-level OAM cells are routed to DMA channel 2. No other incoming packets can use these channels.

AAL5 packets are terminated upon detection of EOP.

Two methods of terminating transparent-AAL packets are provided. The first method uses the PTI bits to

indicate EOP. This method uses a PTI value of 0

× 1 to initiate EOP processing. The second method uses a

counter to count the number of transparent-AAL cells that have been received. Once the counter equals a

predetermined value, the device performs EOP processing. For both methods, the 32-bit CRC, packet abort,

and packet-overflow checks are disabled. In addition, reassembly aging is not performed on receive channels

configured to reassemble transparent-AAL packets using the counter-based method. Receive channels using

the PTI field to determine EOP allows reassembly aging and can experience a time-out. For the PTI-based

scheme, the reassembly time-out provides a method of detecting that the cell containing the EOP indication has

been dropped or lost somewhere in the transmission path.

When the reassembly of a packet is complete, an entry is posted to either the completion rings with or without

interrupt. The ATM header is written to word 0 of the RX completion ring. If the EOP processing started because

of an error condition, that information is posted, along with the packet-byte count and the congestion-cell count,

to word 1. Word 4 of the DMA state table, which holds the SOP pointer, is copied to word 2 of the completion-ring

entry. If the reassembled packet is AAL5, the AAL5 trailer is copied to word 3. Word 6 of the DMA state table,

which contains the free-buffer FIFO pointer/RX free-buffer-ring pointer, is copied to word 4 of the RX

completion-ring entry.

The EOP bit, bit 30 of word 1 in the RX buffer-descriptor entry, is set in the last buffer in a packet during EOP

processing. EOP processing occurs for normal termination of a packet, a RX packet-aging time-out, AAL5 SDU

overflow, abort or buffer starvation. Packet aging is provided to age the packets that are in the reassembly

process. This option is programmable both on global and local level. This feature is intended to be invoked if

a packet fails to proceed to EOP processing because of an error condition in the network.

At initialization, the reassembly-global-aging timer is loaded and a time-out value is written to each DMA state

table entry. When the global counter reaches zero, the TNETA1570 reads the address register to get the DMA

state table to age. If the state table is active, word 7 is read to obtain the time-out value and the current time-out

count. If a time-out has occurred, EOP processing begins immediately. If a time-out has not occurred, the current

time-out count is incremented. If the state table is not active, the current time-out count is not incremented. The

TNETA1570 performs HEC checking for the incoming cell. If a HEC error is detected, the cell is dropped.

XTNETA1622DW 数据表(PDF) 23 Page - Texas Instruments

XTNETA1622DW 数据表(HTML) 23 Page - Texas Instruments

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