XTNETA1622DW datasheet(29/68 Pages) TI1

29 / 68 page

TNETA1570

ATM SEGMENTATION AND REASSEMBLY DEVICE

WITH INTEGRATED 64BIT PCIHOST INTERFACE

SDNS033B − JUNE 1995 − REVISED MAY 1996

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

PRINCIPLES OF OPERATION

transmit completion-ring select (bit 25)

This bit is set by the host to indicate whether the TNETA1570 uses the transmit completion ring with or without

interrupt. It is also set when a buffer completes segmentation. If this bit is set to a one, the TNETA1570 uses

the completion ring with interrupt. If this bit is cleared, the TNETA1570 uses the completion ring without interrupt.

buffer offset (bits 23 −16)

The buffer offset (number of bytes offset from beginning of the payload area) is a pointer into the buffer that

indicates to the segmentation unit where the real data begins. When a new buffer descriptor is imported by the

TNETA1570, the TNETA1570 should store it in TX DMA state table entry memory. The segmentation unit must

add the buffer offset to the start address to create the initial current-buffer-data address. An offset of 0 means

that the data starts immediately.

current-buffer-data-byte count (bits 15 −0)

This field indicates the current number of bytes in the buffer undergoing segmentation. EOP processing is

triggered by this field reaching zero and the end-of-chain bit being set.

word 1

Current-Buffer-Data Address (bits 31 − 0)

The current-buffer pointer is set to a value equal to the start of the buffer plus four 32-bit words (two 64-bit words)

when segmentation of a new buffer begins. After that, the pointer is adjusted to point to the current-data location

after each transfer of payload data from the host.

word 2

GFC (bits 31 − 28)

VPI (bits 27 − 20)

VCI (bits 19 − 4)

PTI (bits 3 − 1)

CLP (bit 0)

Word 2 is copied directly from word 2 of the descriptor entry. This word is copied only from the first buffer in a

packet and is ignored on the subsequent buffers.

word 3

ON (bit 31)

Reserved (bit 30)

Packet-Segmentation-Ring Base-Offset Pointer (bits 29 − 8)

Index 0 − 255 (bits 7 − 0)

This entry must be initialized by the host at startup and prior to the transmit operation being enabled.

ON (bit 31)

The DMA state on this bit is used to turn a particular DMA state on and off. This bit is initialized by the host.

packet-segmentation-ring base-offset pointer (bits 29 −8)

This field contains the base address of the packet-segmentation ring assigned to this transmit DMA channel.

Each segmentation ring contains up to 256 32-bit entries. The segmentation-ring queues are located on

1024-byte boundaries (256

× 4 = 1024). This field must be initialized by the host at startup. This 22-bit field

contains the most-significant bits of the packet-segmentation pointer.

index 0 −255 (bits 7 −0)

This field contains the index to the packet-segmentation-ring entry. This field is incremented by the TNETA1570

after each access to the segmentation ring and compared with the value in the packet-segmentation ring-size

register. If the index field is greater than the value in the size register, the index field is reset to zero prior to being

written back to control memory. The address to the segmentation ring is generated by setting the lower two bits

of the address to zero (word accesses only are permitted) and appending the index and the

segmentation-queue-base-offset pointer as shown below ( x indicates concatenation):

Address = (packet-segmentation-ring base-offset pointer) x (index) x (00)

XTNETA1622DW 数据表(PDF) 29 Page - Texas Instruments

XTNETA1622DW 数据表(HTML) 29 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

数据表下载