XTNETA1622DW datasheet(43/68 Pages) TI1

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TNETA1570

ATM SEGMENTATION AND REASSEMBLY DEVICE

WITH INTEGRATED 64BIT PCIHOST INTERFACE

SDNS033B − JUNE 1995 − REVISED MAY 1996

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

PRINCIPLES OF OPERATION

posted to the receive completion ring without interrupt, an interrupt is not generated. The receive completion

ring without interrupt must be polled by the host to determine if a packet has been posted to this descriptor ring.

Both rings use the same format. Each descriptor entry contains eight 32-bit words as described below.

The definitions of the fields in the word entries are given below:

word 0

ATM Header Byte 1

ATM Header Byte 2

ATM Header Byte 3

ATM Header Byte 4

This word provides the 4-byte ATM header from the last cell in the reassembled packet (unless there has been

a packet-aging time-out when the VPI/VCI value is provided in bits (31 −4), and bits (3 −0) are set to zero).

word 1

Error Indicator (bits 31 − 26)

Reserved (bits 25 −10)

Congestion-Cell Count (bits 9 − 0)

packet overflow (bit 31)

This entry is set by the TNETA1570 indicating that no EOP indicator was found in the packet being reassembled

before the packet-length entry in control memory exceeded its maximum value of 1366 (number of cells

received). This bit is valid only for AAL5 packets.

CRC-error condition (bit 30)

This bit is set by the TNETA1570 when the CRC value calculated on the incoming packet does not match the

CRC value contained in the AAL5 trailer. This bit is valid only for AAL5 packets.

buffer starvation (bit 29)

This bit is set by the TNETA1570 when reassembly of a packet is terminated because no receive free buffers

are available.

reassembly time-out (bit 28)

This bit is set by the TNETA1570 when the reassembly-aging timer reaches its maximum value before an EOP

indication occurs on an incoming packet.

abort condition (bit 27)

This bit is set by the TNETA1570 when the AAL5-length field of the incoming packet is set to zero. This bit is

valid only for AAL5 packets.

AAL5 indicator (bit 26)

This bit is set by the TNETA1570 to indicate that the received packet is an AAL5 packet. The

packet-type-indicator bits in word 0 of the receive DMA state table entry determine whether a packet is an AAL5

packet.

congestion-cell count (bits 9 −0)

This field is copied directly from the upper ten bits of word 0 of the RX DMA state table and contains the number

of cells received with the EFCN indicator set. The EFCN indication is given by a value of 01x in the PTI field

of the ATM header.

word 2

VALID (bit 31)

Reserved (bit 30)

Start-of-Packet Pointer (bits 29 − 0)

XTNETA1622DW 数据表(PDF) 43 Page - Texas Instruments

XTNETA1622DW 数据表(HTML) 43 Page - Texas Instruments

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