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TNETX4080GGP 数据表(PDF) 53 Page - Texas Instruments |
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TNETX4080GGP 数据表(HTML) 53 Page - Texas Instruments |
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53 / 64 page  TNETX4080 ThunderSWITCH II™ 8-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS050A – AUGUST 1998 – REVISED NOVEMBER 1998 53 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MII transmit (see Figure 12) NO. MIN MAX UNIT 1 td(Mxx_TXD) Delay time, from Mxx_TCLK ↑ to Mxx_TXD3–MxxTXD0 valid 0 25 ns 1 td(Mxx_TXEN) Delay time, from Mxx_TCLK ↑ to Mxx_TXEN valid 0 25 ns 1 td(Mxx_TXER) Delay time, from Mxx_TCLK ↑ to Mxx_TXER valid 0 25 ns Mxx_TXD3–Mxx_TXD0 Mxx_TXEN Mxx_TXER 1 Mxx_TCLK Figure 12. MII Transmit MII clock (see Figure 13) NO. MIN MAX UNIT 1 tLOW(Mxx_CLK) Pulse width low Mxx_RCLK, Mxx_TCLK low 40% 60% 2 tHIGH(Mxx_CLK) Pulse width high Mxx_RCLK, Mxx_TCLK high 40% 60% 3 tC(Mxx_CLK) Cycle time Mxx_RCLK, Mxx_TCLK 400 40 ns 4 Mxx_CLK frequency 2.5 25 MHz Mxx_RCLK Mxx_TCLK 1 2 3 Figure 13. MII Clock |
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