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TNETX4080GGP 数据表(PDF) 11 Page - Texas Instruments |
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TNETX4080GGP 数据表(HTML) 11 Page - Texas Instruments |
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11 / 64 page  TNETX4080 ThunderSWITCH II™ 8-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS050A – AUGUST 1998 – REVISED NOVEMBER 1998 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) DIO interface TERMINAL I/O INTERNAL DESCRIPTION NAME NO. I/O RESISTOR DESCRIPTION SAD0 SAD1 AF22 AE22 I Pullup DIO address bus. Selects the internal host registers provided SDMA is high. Internal pullup resistors are provided. SCS AD22 I Pullup DIO chip select. When low, SCS indicates a DIO port access is valid. An internal pullup resistor is provided. SDATA0 SDATA1 SDATA2 SDATA3 SDATA4 SDATA5 SDATA6 SDATA7 AF20 AE20 AD20 AC20 AF21 AE21 AD21 AC21 I/O Pullup DIO data bus. Byte-wide bidirectional DIO port. Internal pullup resistors are required. SDMA AF24 I Pullup DIO DMA select. When low, SDMA modifies the behavior of the DIO interface to allow it to operate efficiently with an external direct memory access (DMA) controller. SAD0 and SAD1 are not used to select the internal host register for the access. Instead, the DIO address to access internal registers is provided by the DMAAddress register, and one of two host register addresses is selected according to dmainc in SysControl. An internal pullup resistor is provided. SINT AF19 O None Interrupt. Interrupt to the attached microprocessor. The interrupt type can be found in the Int register. SRDY AF23 O Pullup DIO ready. When low during reads, SRDY indicates to the host when data is valid to be read. When low during writes, SRDY indicates when data has been received. SRDY is driven high for one clock cycle before placing the output in high impedance after SCS is taken high. An internal pullup resistor is provided. SRNW AC22 I Pullup DIO read not write – When high, read operation is selected. – When low, write operation is selected. An internal pullup resistor is provided. SRXRDY AE23 O None Network management (NM) port, receive ready. When high, SRXRDY indicates that the NM port’s receive buffers are completely empty and the NM port is able to receive a frame of any size up to 1535 bytes in length. STXRDY AD23 O None Network management (NM) port, transmit ready. When high, STXRDY indicates that at least one buffer of frame data is available to be read by the management CPU. It outputs a 1 if any of the end-of-frame (eof), start-of-frame (sof), or interior-of-frame (iof) bits in NMTxControl is set to 1, otherwise, it outputs 0. EEPROM interface TERMINAL I/O INTERNAL DESCRIPTION NAME NO. I/O RESISTOR DESCRIPTION ECLK L26 O None EEPROM data clock. An internal pullup resistor is provided. EDIO M26 I/O Pullup EEPROM data input/output. An internal pullup resistor is provided. LED interface TERMINAL I/O INTERNAL DESCRIPTION NAME NO. I/O RESISTOR DESCRIPTION LED_CLK AD19 O None LED clock. Serial shift clock for the LED status data. LED_DATA AE19 O None LED data. Serial LED status data. |
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