MMPF0100 datasheet(21/136 Pages) FREESCALE

21 / 136 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

PF0100

Functional Block Requirements and Behaviors

Start-up

7.1.2

One Time Programmability (OTP)

OTP allows the programming of start-up configurations for a variety of applications. Before permanently programming the IC by

programming fuses, a configuration may be prototyped by using the “Try Before Buy” (TBB) feature. Further, an error correction

code(ECC) algorithm is available to correct a single bit error and to detect multiple bit errors when fuses are programmed.

The parameters that can be configured by OTP are listed below.

• General: I2C slave address, PWRON pin configuration, start-up sequence and timing

• Buck regulators: Output voltage, dual/single phase or independent mode configuration, switching frequency, and soft

start ramp rate

• Boost regulator and LDOs: Output voltage

NOTE: When prototyping or programming fuses, the user must ensure that register settings are consistent with the hardware

configuration. This is most important for the buck regulators, where the quantity, size, and value of the inductors depend on the

configuration (single/dual phase or independent mode) and the switching frequency. Additionally, if an LDO is powered by a buck

regulator, it will be gated by the buck regulator in the start-up sequence.

7.1.2.1

Start-up Sequence and Timing

Each regulator has 5-bits allocated to program its start-up time slot from a turn on event; therefore, each can be placed from

position one to thirty-one in the start-up sequence. The all zeros code indicates that a regulator is not part of the start-up

sequence and will remain off. See Table 11. The delay between each position is equal; however, four delay options are available.

See Table 12. The start-up sequence will terminate at the last programmed regulator.

tR3

Rise time of regulators(19)

–0.2

–

tD4

Delay between regulators

SEQ_CLK_SPEED[1:0] = 00

–

0.5

–

SEQ_CLK_SPEED[1:0] = 01

–

1.0

–

SEQ_CLK_SPEED[1:0] = 10

–

2.0

–

SEQ_CLK_SPEED[1:0] = 11

–

4.0

–

tR4

Rise time of RESETBMCU

–

0.2

–

tD5

Turn-on delay of RESETBMCU

–

2.0

–

Notes

16.

Assumes LICELL voltage is valid before VIN is applied. If LICELL is not valid before VIN is applied then VSNVS turn-on delay may

extend to a maximum of 24 ms.

17.

Depends on the external signal driving PWRON.

18.

Default configuration.

19.

Rise time is a function of slew rate of regulators and nominal voltage selected.

Table 10. Default Start-up Sequence Timing

Parameter

Description

Min

Typ

Max

Unit

MMPF0100 数据表(PDF) 21 Page - Freescale Semiconductor, Inc

MMPF0100 数据表(HTML) 21 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载