MMPF0100 datasheet(82/136 Pages) FREESCALE

部件名	MMPF0100

功能描述	14 Channel Configurable Power Management Integrated Circuit

PDF	136 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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82 / 136 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

PF0100

Functional Block Requirements and Behaviors

Power Generation

7.4.6

LDO Regulators Description

This section describes the LDO regulators provided by the PF0100. All regulators use the main bandgap as reference. Refer to

Bias and References Block Description section for further information on the internal reference voltages.

A Low Power mode is automatically activated by reducing bias currents when the load current is less than I_Lmax/5. However,

the lowest bias currents may be attained by forcing the part into its Low Power mode by setting the VGENxLPWR bit. The use

of this bit is only recommended when the load is expected to be less than I_Lmax/50, otherwise performance may be degraded.

When a regulator is disabled, the output will be discharged by an internal pull-down. The pull-down is also activated when

RESETBMCU is low.

VGENx

VINx

VGENx

CGENx

VGENxEN

VGENxLPWR

VREF

VGENx

Interface

Discharge

Figure 23. General LDO Block Diagram

MMPF0100 数据表(PDF) 82 Page - Freescale Semiconductor, Inc