 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
MMPF0100 数据表(PDF) 10 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MMPF0100 数据表(HTML) 10 Page - Freescale Semiconductor, Inc |
|
|
10 / 136 page  Analog Integrated Circuit Device Data 10 Freescale Semiconductor PF0100 Pin Connections Pin Definitions 46 SWBSTLX O 7.5 V Analog SWBST switch node connection 47 VDDOTP I 9.0 V(3) Digital & Analog Supply to program OTP fuses 48 GNDREF GND - GND Ground reference for the main band gap regulator. 49 VCORE O 3.6 V Analog Analog Core supply 50 VIN I 4.8 V Analog Main chip supply 51 VCOREDIG O 1.5 V Analog Digital Core supply 52 VCOREREF O 1.5 V Analog Main band gap reference 53 SDA I/O 3.6 V Digital I2C data line (Open drain) 54 SCL I 3.6 V Digital I2C clock 55 VDDIO I 3.6 V Analog Supply for I2C bus 56 PWRON I 3.6 V Digital Power On/off from processor - EP GND - GND Expose pad. Functions as ground return for buck regulators. Tie this pad to the inner and external ground planes through vias to allow effective thermal dissipation. Notes 3. 9.0 V Maximum voltage rating during OTP fuse programming. 7.5 V Maximum DC voltage rated otherwise. Table 3. PF0100 Pin Definitions (continued) Pin Number Pin Name Pin Function Max Rating Type Definition |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
