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MMPF0100 数据表(PDF) 63 Page - Freescale Semiconductor, Inc |
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MMPF0100 数据表(HTML) 63 Page - Freescale Semiconductor, Inc |
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63 / 136 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 63 PF0100 Functional Block Requirements and Behaviors Power Generation SW3A - SW3B Independent Outputs SW3A and SW3B can be configured as independent outputs as shown in Figure 18, providing flexibility for applications requiring more voltage rails with less current capability. Each output is configured and controlled independently by its respective I2C registers as shown in Table 65. Driver Controller EA Z1 Z2 Internal Compensation SW3AIN SW3ALX SW3AFB ISENSE COSW3A CINSW3A LSW3A I2C Interface GNDSW3A SW3A SW3AMODE SW3AFAULT VREF DAC I2C VIN Driver Controller EA Z1 Z2 Internal Compensation SW3BIN SW3BLX SW3BFB ISENSE COSW3B CINSW3B LSW3B GNDSW3B SW3B SW3BMODE SW3BFAULT VREF DAC I2C VIN Figure 18. SW3A/B Independent Output Block Diagram SW3A/B Setup and Control Registers SW3A/B output voltage is programmable from 0.400 to 3.300 V; however, bit SW3x[6] in register SW3xVOLT is read-only during normal operation. Its value is determined by the default configuration, or may be changed by using the OTP registers. Therefore, once SW3x[6] is set to “0”, the output will be limited to the lower output voltages from 0.40 to 1.975 V with 25 mV increments, as determined by bits SW3x[5:0]. Likewise, once bit SW3x[6] is set to "1", the output voltage will be limited to the higher output voltage range from 0.800 to 3.300 V with 50 mV increments, as determined by bits SW3x[5:0]. In order to optimize the performance of the regulator, it is recommended that only voltages from 2.00 to 3.300 V be used in the high range and that that the lower range be used for voltages from 0.400 to 1.975 V. The output voltage set point is independently programmed for Normal, Standby, and Sleep mode by setting the SW3x[5:0], SW3xSTBY[5:0], and SW3xOFF[5:0] bits respectively; however, the initial state of the SW3x[6] bit will be copied into the SW3xSTBY[6] and SW3xOFF[6] bits. Therefore, the output voltage range will remain the same on all three operating modes. Table 64 shows the output voltage coding valid for SW3x. |
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