SPC56AP54X datasheet(82/104 Pages) STMICROELECTRONICS

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Electrical characteristics

SPC56xP54x, SPC56xP60x

82/104

Doc ID 18340 Rev 3

The maximum program and erase times occur after the specified number of program/erase cycles. These maximum values

are characterized but not guaranteed.

Actual hardware programming times. This does not include software overhead.

Typical bank programming time assumes that all cells are programmed in a single pulse. In reality some cells will require

more than one pulse, adding a small overhead to total bank programming time (see Initial Max column).

Time between erase suspend resume and next erase suspend.

Table 34.

Flash memory module life

Symbol

Parameter

Conditions

Value

Unit

Min

Typ

P/E

Number of program/erase cycles per block

for 16 KB blocks over the operating

temperature range (TJ)

—

100000

cycles

P/E

Number of program/erase cycles per block

for 32 KB blocks over the operating

temperature range (TJ)

—

10000

100000

cycles

P/E

Number of program/erase cycles per block

for 64 KB blocks over the operating

temperature range (TJ)

—

10000

100000

cycles

P/E

Number of program/erase cycles per block

for 128 KB blocks over the operating

temperature range (TJ)

—

1000

100000

cycles

Retention

Minimum data retention at 85 °C average

ambient temperature(1)

Blocks with 0 – 1000

P/E cycles

—

years

Blocks with 10000 P/E

cycles

—

years

Blocks with 100000 P/E

cycles

5—

years

Ambient temperature averaged over duration of application, not to exceed recommended product operating temperature

range.

Table 35.

Flash read access timing

Symbol

Parameter

Conditions(1)

VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = –40 to 125 °C, unless otherwise specified

Max

Unit

Fmax

Maximum working frequency for Code Flash

at given number of WS in worst conditions

2 wait states

MHz

0 wait states

Fmax

Maximum working frequency for Data Flash at

given number of WS in worst conditions

8 wait states

MHz

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