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M24LR04E-R 数据表(PDF) 41 Page - STMicroelectronics |
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M24LR04E-R 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 142 page  M24LR04E-R M24LR04E-R memory initial state Doc ID 022208 Rev 5 41/142 6 M24LR04E-R memory initial state The device is delivered with all bits set to 1 in the user memory array. ● User Memory content : FFh ● System bits delivery ● I2C write lock bits 00h ● Sector Security Status: 00h ● I2C Password: 0000 0000 h ● RF Password: 0000 0000 h ● IC ref: 5Ah ● UID: E0 02 xx xx xx xx h ● DSFID: FFh ● AFI: 00h ● Memory size: 03 7Fh ● Energy Harvesting Configuration byte: F4h ● Bit 7 to bit 4: all set to 1 ● Bit 3: set to 0 (RF BUSY mode on RF WIP/BUSY pin) ● Bit 2: set to 1 (Energy harvesting not activated by default) ● Bit 1 and bit 0: set to 0 (fan-out setting) |
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