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PIC24FJ64GA 数据表(PDF) 24 Page - Microchip Technology

部件名 PIC24FJ64GA
功能描述  PIC24FJXXXGA0XX Flash Programming Specification
PDF  52 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC24FJ64GA 数据表(HTML) 24 Page - Microchip Technology

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PIC24FJXXXGA0XX
DS39768D-page 24
© 2008 Microchip Technology Inc.
3.9
Reading Configuration Words
The procedure for reading configuration memory is
similar to the procedure for reading code memory,
except that 16-bit data words are read (with the upper
byte read being all ‘0’s) instead of 24-bit words. Since
there are two Configuration registers, they are read one
register at a time.
Table 3-9 shows the ICSP programming details for
reading the Configuration Words. Note that the
TBLPAG register must be loaded with 00h for 96 Kbyte
and below devices and 01h for 128 Kbyte devices (the
upper byte address of configuration memory), and the
Read Pointer, W6, is initialized to the lower 16 bits of
the Configuration Word location.
TABLE 3-9:
SERIAL INSTRUCTION EXECUTION FOR READING ALL CONFIGURATION MEMORY
Command
(Binary)
Data
(Hex)
Description
Step 1: Exit Reset vector.
0000
0000
0000
000000
040200
000000
NOP
GOTO
0x200
NOP
Step 2: Initialize TBLPAG, the Read Pointer (W6) and the Write Pointer (W7) for TBLRD instruction.
0000
0000
0000
0000
0000
200xx0
880190
2xxxx7
207847
000000
MOV
<CW2Address23:16>, W0
MOV
W0, TBLPAG
MOV
<CW2Address15:0>, W6
MOV
#VISI, W7
NOP
Step 3: Read the Configuration register and write it to the VISI register (located at 784h), and clock out the
VISI register using the REGOUT command.
0000
0000
0000
0001
0000
BA0BB6
000000
000000
<VISI>
000000
TBLRDL
[W6++], [W7]
NOP
NOP
Clock out contents of VISI register
NOP
Step 4: Repeat Step 3 again to read Configuration Word 1.
Step 5: Reset device internal PC.
0000
0000
040200
000000
GOTO
0x200
NOP



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