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PIC24FJ64GA 数据表(PDF) 2 Page - Microchip Technology

部件名 PIC24FJ64GA
功能描述  PIC24FJXXXGA0XX Flash Programming Specification
PDF  52 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC24FJ64GA 数据表(HTML) 2 Page - Microchip Technology

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PIC24FJXXXGA0XX
DS39768D-page 2
© 2008 Microchip Technology Inc.
The regulator provides power to the core from the other
VDD pins. A low-ESR capacitor (such as tantalum) must
be connected to the VDDCORE pin (Figure 2-2 and
Figure 2-3). This helps to maintain the stability of the
regulator. The specifications for core voltage and capac-
itance are listed in Section 7.0 “AC/DC Characteristics
and Timing Requirements”.
FIGURE 2-2:
CONNECTIONS FOR THE
ON-CHIP REGULATOR
(64/80/100-PIN DEVICES)
FIGURE 2-3:
CONNECTIONS FOR THE
ON-CHIP REGULATOR
(28/44-PIN DEVICES)
VDD
ENVREG
VDDCORE/VCAP
VSS
PIC24FJXXXGA0XX
CEFC
3.3V
Regulator Enabled (ENVREG tied to VDD):
(10
μF typ)
Note 1: These are typical operating voltages. Refer
to Section 7.0 “AC/DC Characteristics and
Timing Requirements” for the full operating
ranges of VDD and VDDCORE.
VDD
ENVREG
VDDCORE/VCAP
VSS
PIC24FJXXXGA0XX
3.3V(1)
2.5V(1)
Regulator Disabled (ENVREG tied to ground):
VDD
ENVREG
VDDCORE/VCAP
VSS
PIC24FJXXXGA0XX
2.5V(1)
Regulator Disabled (VDD tied to VDDCORE):
VDD
DISVREG
VDDCORE/VCAP
VSS
PIC24FJXXXGA0XX
3.3V(1)
2.5V(1)
Regulator Disabled (DISVREG tied to VDD):
VDD
DISVREG
VDDCORE/VCAP
VSS
PIC24FJXXXGA0XX
2.5V(1)
Regulator Disabled (VDD tied to VDDCORE):
VDD
DISVREG
VDDCORE/VCAP
VSS
PIC24FJXXXGA0XX
CEFC
3.3V
(10
μF typ)
Regulator Enabled (DISVREG tied to VSS):
Note 1: These are typical operating voltages. Refer
to Section 7.0 “AC/DC Characteristics and
Timing Requirements” for the full operating
ranges of VDD and VDDCORE.



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