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PSD813F2 数据表(PDF) 53 Page - STMicroelectronics

部件名 PSD813F2
功能描述  Flash in-system programmable (ISP) peripherals
PDF  128 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

PSD813F2 数据表(HTML) 53 Page - STMicroelectronics

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14.4
Output macrocell (OMC)
Eight of the Output macrocells (OMC) are connected to ports A and B pins and are named
as McellAB0-McellAB7. The other eight macrocells are connected to ports B and C pins and
are named as McellBC0-McellBC7. If an McellAB output is not assigned to a specific pin in
PSDabel, the macrocell Allocator block assigns it to either port A or B. The same is true for
a McellBC output on port B or C. Table 16 shows the macrocells and port assignment.
The Output macrocell (OMC) architecture is shown in Figure 15. As shown in the figure,
there are native product terms available from the AND Array, and borrowed product terms
available (if unused) from other Output macrocells (OMC). The polarity of the product term
is controlled by the XOR gate. The Output macrocell (OMC) can implement either sequential
logic, using the flip-flop element, or combinatorial logic. The multiplexer selects between the
sequential or combinatorial logic outputs. The multiplexer output can drive a port pin and
has a feedback path to the AND Array inputs.
The flip-flop in the Output macrocell (OMC) block can be configured as a D, T, JK, or SR
type in the PSDabel program. The flip-flop’s clock, preset, and clear inputs may be driven
from a product term of the AND Array. Alternatively, CLKIN (PD1) can be used for the clock
input to the flip-flop. The flip-flop is clocked on the rising edge of CLKIN (PD1). The preset
and clear are active high inputs. Each clear input can use up to two product terms.
Table 16.
Output macrocell port and data bit assignments
Output
macrocell
Port
assignment
Native product
terms
Maximum
borrowed product
terms
Data bit for loading
or reading
McellAB0
Port A0, B0
3
6
D0
McellAB1
Port A1, B1
3
6
D1
McellAB2
Port A2, B2
3
6
D2
McellAB3
Port A3, B3
3
6
D3
McellAB4
Port A4, B4
3
6
D4
McellAB5
Port A5, B5
3
6
D5
McellAB6
Port A6, B6
3
6
D6
McellAB7
Port A7, B7
3
6
D7
McellBC0
Port B0, C0
4
5
D0
McellBC1
Port B1, C1
4
5
D1
McellBC2
Port B2, C2
4
5
D2
McellBC3
Port B3, C3
4
5
D3
McellBC4
Port B4, C4
4
6
D4
McellBC5
Port B5, C5
4
6
D5
McellBC6
Port B6, C6
4
6
D6
McellBC7
Port B7, C7
4
6
D7
Obsolete
Product(s)
- Obsolete
Product(s)



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