PSD813F2 datasheet(17/128 Pages) STMICROELECTRONICS

17 / 128 page

PSD8XXFX

Pin description

Doc ID 7833 Rev 7

17/128

PC3

I/O

PC3 pin of port C. This port pin can be configured to have the following functions:

MCU I/O – write to or read from a standard output or input port.

CPLD macrocell (McellBC3) output.

Input to the PLDs.

TSTAT output(2) for the JTAG Serial Interface.

Ready/Busy output for parallel in-system programming (ISP).

This pin can be configured as a CMOS or Open Drain output.

PC4

I/O

PC4 pin of port C. This port pin can be configured to have the following functions:

MCU I/O – write to or read from a standard output or input port.

CPLD macrocell (McellBC4) output.

Input to the PLDs.

TERR output(2) for the JTAG Serial Interface.

This pin can be configured as a CMOS or Open Drain output.

PC5

I/O

PC5 pin of port C. This port pin can be configured to have the following functions:

MCU I/O – write to or read from a standard output or input port.

CPLD macrocell (McellBC5) output.

Input to the PLDs.

TDI input(2) for the JTAG Serial Interface.

This pin can be configured as a CMOS or Open Drain output.

PC6

I/O

PC6 pin of port C. This port pin can be configured to have the following functions:

MCU I/O – write to or read from a standard output or input port.

CPLD macrocell (McellBC6) output.

Input to the PLDs.

TDO output(2) for the JTAG Serial Interface.

This pin can be configured as a CMOS or Open Drain output.

PC7

I/O

PC7 pin of port C. This port pin can be configured to have the following functions:

MCU I/O – write to or read from a standard output or input port.

CPLD macrocell (McellBC7) output.

Input to the PLDs.

DBE – active low Data Byte Enable input from 68HC912 type MCUs.

This pin can be configured as a CMOS or Open Drain output.

PD0

I/O

PD0 pin of port D. This port pin can be configured to have the following functions:

ALE/AS input latches address output from the MCU.

MCU I/O – write or read from a standard output or input port.

Input to the PLDs.

CPLD output (External Chip Select).

PD1

I/O

PD1 pin of port D. This port pin can be configured to have the following functions:

MCU I/O – write to or read from a standard output or input port.

Input to the PLDs.

CPLD output (External Chip Select).

CLKIN – clock input to the CPLD macrocells, the APD Unit’s Power-down counter, and

the CPLD AND Array.

Table 3.

PLCC52 pin description (1) (continued)

Pin name

Type

Description

Obsolete

Product(s)

- Obsolete

Product(s)

PSD813F2 数据表(PDF) 17 Page - STMicroelectronics

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PSD813F2 数据表(PDF) 17 Page - STMicroelectronics

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