PSD813F2 datasheet(27/128 Pages) STMICROELECTRONICS

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PSD8XXFX

Detailed operation

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6.2

Description of primary Flash memory and secondary Flash

memory

The primary Flash memory is divided evenly into eight equal sectors. The secondary Flash

memory is divided into four equal sectors. Each sector of either memory block can be

separately protected from Program and Erase cycles.

Flash memory may be erased on a sector-by-sector basis. Flash sector erasure may be

suspended while data is read from other sectors of the block and then resumed after

reading.

During a program or erase cycle in Flash memory, the status can be output on Ready/Busy

(PC3). This pin is set up using PSDsoft Express Configuration.

6.3

Memory block select signals

The DPLD generates the Select signals for all the internal memory blocks (see Section 14:

PLDS). Each of the eight sectors of the primary Flash memory has a Select signal (FS0-

FS7) which can contain up to three product terms. Each of the four sectors of the secondary

Flash memory has a Select signal (CSBOOT0-CSBOOT3) which can contain up to three

product terms. Having three product terms for each Select signal allows a given sector to be

mapped in different areas of system memory. When using a MCU with separate program

and data space, these flexible Select signals allow dynamic re-mapping of sectors from one

memory space to the other.

6.3.1

Ready/Busy (PC3)

This signal can be used to output the Ready/Busy status of the PSD. The output on

Ready/Busy (PC3) is a 0 (Busy) when Flash memory is being written to, or when Flash

memory is being erased. The output is a 1 (Ready) when no WRITE or Erase cycle is in

progress.

6.3.2

Memory operation

The primary Flash memory and secondary Flash memory are addressed through the MCU

bus interface. The MCU can access these memories in one of two ways:

●

The MCU can execute a typical bus WRITE or READ operation just as it would if

accessing a RAM or ROM device using standard bus cycles.

●

The MCU can execute a specific instruction that consists of several WRITE and READ

operations. This involves writing specific data patterns to special addresses within the

Flash memory to invoke an embedded algorithm. These instructions are summarized in

Table 10.

Typically, the MCU can read Flash memory using READ operations, just as it would read a

ROM device. However, Flash memory can only be altered using specific Erase and Program

instructions. For example, the MCU cannot write a single byte directly to Flash memory as it

would write a byte to RAM. To program a byte into Flash memory, the MCU must execute a

Program instruction, then test the status of the Program cycle. This status test is achieved

by a READ operation or polling Ready/Busy (PC3).

Flash memory can also be read by using special instructions to retrieve particular Flash

device information (sector protect status and ID).

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