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PSD813F2 数据表(PDF) 41 Page - STMicroelectronics

部件名 PSD813F2
功能描述  Flash in-system programmable (ISP) peripherals
PDF  128 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

PSD813F2 数据表(HTML) 41 Page - STMicroelectronics

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PSD8XXFX
Specific features
Doc ID 7833 Rev 7
41/128
10.3
Reset (RESET) signal (on the PSD83xF2 and PSD85xF2)
A pulse on Reset (RESET) aborts any cycle that is in progress, and resets the Flash
memory to the READ mode. When the reset occurs during a program or erase cycle, the
Flash memory takes up to 25
μs to return to the READ mode. It is recommended that the
Reset (RESET) pulse (except for Power On Reset, as described in Section 18: Reset timing
and device status at reset) be at least 25 µs so that the Flash memory is always ready for
the MCU to fetch the bootstrap instructions after the Reset cycle is complete.
Table 12.
Sector Protection/Security Bit definition – Flash Protection register(1)
1.
Bit Definitions:
Sec<i>_Prot 1 = Primary Flash memory or secondary Flash memory Sector <i> is write protected.
Sec<i>_Prot 0 = Primary Flash memory or secondary Flash memory Sector <i> is not write protected.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Sec7_Prot
Sec6_Prot
Sec5_Prot
Sec4_Prot
Sec3_Prot
Sec2_Prot
Sec1_Prot
Sec0_Prot
Table 13.
Sector Protection/Security Bit definition – PSD/EE Protection register(1)
1.
Bit Definitions:
Sec<i>_Prot 1 = Secondary Flash memory Sector <i> is write protected.
Sec<i>_Prot 0 = Secondary Flash memory Sector <i> is not write protected.
Security_Bit 0 = Security Bit in device has not been set.
1 = Security Bit in device has been set.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Security_B
it
not used
not used
not used
Sec3_Prot
Sec2_Prot
Sec1_Prot
Sec0_Prot
Obsolete
Product(s)
- Obsolete
Product(s)



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