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AD9524/PCBZ 数据表(PDF) 43 Page - Analog Devices |
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AD9524/PCBZ 数据表(HTML) 43 Page - Analog Devices |
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43 / 56 page ![]() Data Sheet AD9524 Rev. E | Page 43 of 56 CONTROL REGISTER MAP BIT DESCRIPTIONS Serial Port Configuration (Address 0x000 to Address 0x006) Table 32. SPI Mode Serial Port Configuration Address Bits Bit Name Description 0x000 7 SDO active Selects unidirectional or bidirectional data transfer mode. This bit is ignored in I2C mode. 0: SDIO pin used for write and read; SDO is high impedance (default). 1: SDO used for read; SDIO used for write; unidirectional mode. 6 LSB first/ address increment SPI MSB or LSB data orientation. This bit is ignored in I2C mode. 0: data-oriented MSB first; addressing decrements (default). 1: data-oriented LSB first; addressing increments. 5 Soft reset Soft reset. 1 (self clearing): soft reset; restores default values to internal registers. 4 Reserved Reserved. [3:0] Mirror[7:4] Bits[3:0] should always mirror Bits[7:4] so that it does not matter whether the part is in MSB first or LSB first mode (see Register 0x000, Bit 6). Set bits as follows: Bit 0 = Bit 7. Bit 1 = Bit 6. Bit 2 = Bit 5. Bit 3 = Bit 4. 0x004 0 Read back active registers For buffered registers, serial port readback reads from actual (active) registers instead of from the buffer. 0 (default): reads values currently applied to the internal logic of the device. 1: reads buffered values that take effect on the next assertion of the I/O update. Table 33. I2C Mode Serial Port Configuration Address Bits Bit Name Description 0x000 [7:6] Reserved Reserved. 5 Soft reset Soft reset. 1 (self clearing): soft reset; restores default values to internal registers. 4 Reserved Reserved. [3:0] Mirror[7:4] Bits[3:0] should always mirror Bits[7:4]. Set bits as follows: Bit 0 = Bit 7. Bit 1 = Bit 6. Bit 2 = Bit 5. Bit 3 = Bit 4. 0x004 0 Read back active registers For buffered registers, serial port readback reads from actual (active) registers instead of from the buffer. 0 (default): reads values currently applied to the internal logic of the device. 1: reads buffered values that take effect on the next assertion of the I/O update. Table 34. EEPROM Customer Version ID Address Bits Bit Name Description 0x005 [7:0] EEPROM customer version ID (LSB) 16-bit EEPROM ID, Bits[7:0]. This register, along with Register 0x006, allows the user to store a unique ID to identify which version of the AD9524 register settings is stored in the EEPROM. It does not affect AD9524 operation in any way (default: 0x00). 0x006 [7:0] EEPROM customer version ID (MSB) 16-bit EEPROM ID, Bits[15:8]. This register, along with Register 0x005, allows the user to store a unique ID to identify which version of the AD9524 register settings is stored in the EEPROM. It does not affect AD9524 operation in any way (default: 0x00). |
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