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AD9524/PCBZ 数据表(PDF) 49 Page - Analog Devices

部件名 AD9524/PCBZ
功能描述  Jitter Cleaner and Clock Generator with 6 Differential or 13 LVCMOS Outputs
PDF  56 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9524/PCBZ 数据表(HTML) 49 Page - Analog Devices

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Data Sheet
AD9524
Rev. E | Page 49 of 56
Table 50. PLL2 Loop Filter Control
Address
Bits
Bit Name
Description
0x0F5
[7:6]
Pole 2 resistor (RPOLE2)
Bit 7
Bit 6
RPOLE2
(Ω)
0
0
900
0
1
450
1
0
300
1
1
225
[5:3]
Zero resistor (RZERO)
Bit 5
Bit 4
Bit 3
RZERO
(Ω)
0
0
0
3250
0
0
1
2750
0
1
0
2250
0
1
1
2100
1
0
0
3000
1
0
1
2500
1
1
0
2000
1
1
1
1850
[2:0]
Pole 1 capacitor (CPOLE1)
Bit 2
Bit 1
Bit 0
CPOLE1
(pF)
0
0
0
0
0
0
1
8
0
1
0
16
0
1
1
24
1
0
0
24
1
0
1
32
1
1
0
40
1
1
1
48
0x0F6
[7:1]
Reserved
Reserved.
0
Bypass internal RZERO
resistor
Bypasses the internal RZERO resistor (RZERO = 0 Ω). Requires the use of a series external zero resistor.
This bit is the MSB of the loop filter control register (Address 0x0F5 and Address 0x0F6).



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