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ADMCF341 数据表(PDF) 35 Page - Analog Devices |
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ADMCF341 数据表(HTML) 35 Page - Analog Devices |
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35 / 36 page ![]() REV. A ADMC(F)341 –35– 1 DM (0x3FFE) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 MEMWAIT (R/W) 1 1 0 0 0 0 00 0 11 1 1 1 SPORT1 CONFIGURE 0 = FI, FO, IRQ0, IRQ1, SCLK 1 = SERIAL PORT SPORT1 ENABLE 0 = DISABLED 1 = ENABLED SYSCNTL (R/W) DM (0x3FFF) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 11 1 1 11 1 1 1 1 1 1111 SPORT0 ENABLE 0 = DISABLED 1 = DISABLED Figure 31. Configuration of Registers Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—these bits should always be written as shown. |
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