SH1

SH2

2

1

2

2

Forward drive

Slow decay (brake)

VM

1

SH1

SH2

2

1

2

2

Reverse drive

Slow decay (brake)

VM

1

3

3 High-Z (coast)

3 High-Z (coast)

3

DRV8701

SLVSCX5B – MARCH 2015 – REVISED JULY 2015

www.ti.com

7.3 Feature Description

7.3.1 Bridge Control

The DRV8701E is controlled using a PH/EN interface. The following logic table (Table 1) gives the full H-bridge

state when driving a single brushed DC motor. Note that Table 1 does not take into account the current control

built into the DRV8701E. Positive current is defined in the direction of xOUT1

→ xOUT2.

Table 1. DRV8701E (PH/EN) Control Interface

nSLEEP

EN

PH

SH1

SH2

AVDD/DVDD

Description

0

X

X

High-Z

High-Z

Disabled

Sleep mode; H-bridge disabled High-Z

1

0

X

L

L

Enabled

Brake, low-side slow decay

1

1

0

L

H

Enabled

Reverse drive (current SH2

→ SH1)

1

1

1

H

L

Enabled

Forward drive (current SH1

→ SH2)

The DRV8701P is controlled using a PWM interface (IN1/IN2). The following logic table (Table 2) gives the full H-

bridge state when driving a single brushed DC motor. Note that Table 2 does not take into account the current

control built into the DRV8701P. Positive current is defined in the direction of xOUT1

→ xOUT2.

Table 2. DRV8701P (PWM) Control Interface

nSLEEP

IN1

IN2

SH1

SH2

AVDD/DVDD

Description

0

X

X

High-Z

High-Z

Disabled

Sleep mode; H-bridge disabled High-Z

1

0

0

High-Z

High-Z

Enabled

Coast; H-bridge disabled High-Z

1

0

1

L

H

Enabled

Reverse (current SH2

→ SH1)

1

1

0

H

L

Enabled

Forward (current SH1

→ SH2)

1

1

1

L

L

Enabled

Brake; low-side slow decay

Figure 19. H-Bridge Operational States

14

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