数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

DRV8701PRGET 数据表(PDF) 3 Page - Texas Instruments

Click here to check the latest version.
部件名 DRV8701PRGET
功能描述  DRV8701 Brushed DC Motor Full-Bridge Gate Driver
PDF  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRV8701PRGET 数据表(HTML) 3 Page - Texas Instruments

  DRV8701PRGET Datasheet HTML 1Page - Texas Instruments DRV8701PRGET Datasheet HTML 2Page - Texas Instruments DRV8701PRGET Datasheet HTML 3Page - Texas Instruments DRV8701PRGET Datasheet HTML 4Page - Texas Instruments DRV8701PRGET Datasheet HTML 5Page - Texas Instruments DRV8701PRGET Datasheet HTML 6Page - Texas Instruments DRV8701PRGET Datasheet HTML 7Page - Texas Instruments DRV8701PRGET Datasheet HTML 8Page - Texas Instruments DRV8701PRGET Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 42 page
background image
1
2
3
4
5
6
18
17
16
15
14
13
VM
VCP
CPH
CPL
GND
VREF
SH1
GH1
GND
PH
EN
nSLEEP
GND
(PPAD)
1
2
3
4
5
6
18
17
16
15
14
13
VM
VCP
CPH
CPL
GND
VREF
SH1
GH1
GND
IN1
IN2
nSLEEP
GND
(PPAD)
DRV8701
www.ti.com
SLVSCX5B – MARCH 2015 – REVISED JULY 2015
5 Pin Configuration and Functions
RGE Package
RGE Package
24-Pin VQFN
24-Pin VQFN
DRV8701E Top View
DRV8701P Top View
DRV8701E (PH/EN)
PIN
TYPE
DESCRIPTION
NAME
NO.
EN
14
Input
Bridge enable input
Logic low places the bridge in brake mode; see Table 1
PH
15
Input
Bridge phase input
Controls the direction of the H-bridge; see Table 1
DRV8701P (PWM)
PIN
TYPE
DESCRIPTION
NAME
NO.
IN1
15
Input
Bridge PWM input
Logic controls the state of H-bridge; see Table 2
IN2
14
Input
Common Pins
PIN
TYPE
DESCRIPTION
NAME
NO.
Connect to motor supply voltage; bypass to GND with a 0.1-µF
VM
1
Power
Power supply
ceramic plus a 10-µF minimum capacitor rated for VM; additional
capacitance may be required based on drive current
5
GND
16
Power
Device ground
Must be connected to ground
PPAD
VCP
2
Power
Charge pump output
Connect a 16-V, 1-µF ceramic capacitor to VM
CPH
3
Connect a 0.1-µF X7R capacitor rated for VM between CPH and
Power
Charge pump switching nodes
CPL
CPL
4
3.3-V logic supply regulator; bypass to GND with a 6.3-V, 1-µF
DVDD
8
Power
Logic regulator
ceramic capacitor
4.8-V analog supply regulator; bypass to GND with a 6.3-V, 1-µF
AVDD
7
Power
Analog regulator
ceramic capacitor
Pull logic low to put device into a low-power sleep mode with FETs
nSLEEP
13
Input
Device sleep mode
High-Z; internal pulldown
Resistor value or voltage forced on this pin sets the gate drive
IDRIVE
12
Input
Gate drive current setting pin
current; see applications section for more details
Copyright © 2015, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: DRV8701



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com