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TAS5731MPHPR 数据表(PDF) 38 Page - Texas Instruments |
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TAS5731MPHPR 数据表(HTML) 38 Page - Texas Instruments |
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38 / 81 page  A6 A5 A0 R/W ACK A7 A6 A5 A4 A0 ACK A6 A5 A0 ACK Start Condition Stop Condition Acknowledge Acknowledge Acknowledge I CDevice Addressand 2 Read/WriteBit Subaddress DataByte D7 D6 D1 D0 ACK I CDevice Addressand Read/WriteBit 2 Not Acknowledge R/W A1 A1 RepeatStart Condition T0036-03 D7 D0 ACK Stop Condition Acknowledge I CDevice Addressand 2 Read/WriteBit Subaddress LastDataByte A6 A5 A1 A0 R/W ACK A7 A5 A1 A0 ACK D7 ACK Start Condition Acknowledge Acknowledge Acknowledge FirstDataByte A4 A3 A6 OtherDataBytes ACK Acknowledge D0 D7 D0 T0036-02 A6 A5 A4 A3 A2 A1 A0 R/W ACK A7 A6 A5 A4 A3 A2 A1 A0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK Start Condition Stop Condition Acknowledge Acknowledge Acknowledge I CDevice Addressand 2 Read/WriteBit Subaddress DataByte T0036-01 TAS5731M SLOS838C – JULY 2013 – REVISED AUGUST 2015 www.ti.com Programming (continued) Figure 61. Single-Byte Write Transfer 9.5.1.4 Multiple-Byte Write A multiple-byte data-write transfer is identical to a single-byte data-write transfer except that multiple data bytes are transmitted by the master device to the DAP as shown in Figure 62. After receiving each data byte, the TAS5731M responds with an acknowledge bit. Figure 62. Multiple-Byte Write Transfer 9.5.1.5 Single-Byte Read As shown in Figure 63, a single-byte data-read transfer begins with the master device transmitting a start condition, followed by the I2C device address and the read/write bit. For the data read transfer, both a write followed by a read are actually done. Initially, a write is done to transfer the address byte or bytes of the internal memory address to be read. As a result, the read/write bit becomes a 0. After receiving the TAS5731M address and the read/write bit, TAS5731M responds with an acknowledge bit. In addition, after sending the internal memory address byte or bytes, the master device transmits another start condition followed by the TAS5731M address and the read/write bit again. This time, the read/write bit becomes a 1, indicating a read transfer. After receiving the address and the read/write bit, the TAS5731M again responds with an acknowledge bit. Next, the TAS5731M transmits the data byte from the memory address being read. After receiving the data byte, the master device transmits a not-acknowledge followed by a stop condition to complete the single-byte data-read transfer. Figure 63. Single-Byte Read Transfer 9.5.1.6 Multiple-Byte Read A multiple-byte data-read transfer is identical to a single-byte data-read transfer except that multiple data bytes are transmitted by the TAS5731M to the master device as shown in Figure 64. Except for the last data byte, the master device responds with an acknowledge bit after receiving each data byte. 38 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: TAS5731M |
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