| 数据搜索系统,热门电子元器件搜索 |
|
TAS5731MPHPR 数据表(PDF) 64 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TAS5731MPHPR 数据表(HTML) 64 Page - Texas Instruments |
|
64 / 81 page ![]() TAS5731M SLOS838C – JULY 2013 – REVISED AUGUST 2015 www.ti.com 10.2.1.2.4.3 Shutdown Sequence Enter: 1. Write 0x40 to register 0x05. 2. Wait at least 1 ms + 1.3 × tstop (where tstop is specified by register 0x1A). 3. If desired, reconfigure by returning to step 4 of initialization sequence. Exit: 1. Write 0x00 to register 0x05 (exit shutdown command may not be serviced for as much as 240 ms after trim following AVDD/DVDD power-up ramp). 2. Wait at least 1 ms + 1.3 × tstart (where tstart is specified by register 0x1A). 3. Proceed with normal operation. 10.2.1.2.4.4 Power-Down Sequence Use the following sequence to power down the device and its supplies: 1. If time permits, enter shutdown (sequence defined in Shutdown Sequence); else, in case of sudden power loss, assert PDN = 0 and wait at least 2 ms. 2. Assert RESET = 0. 3. Drive digital inputs low and ramp down PVDD supply as follows: • Drive all digital inputs low after RESET has been low for at least 2 µs. • Ramp down PVDD while ensuring that it remains above 8 V until RESET has been low for at least 2 µs. 4. Ramp down AVDD/DVDD while ensuring that it remains above 3 V until PVDD is below 6 V and that it is never more than 2.5 V below the digital inputs. 10.2.1.3 Application Curves space Table 25. Relevant Performance Curves CURVE TITLE FIGURE Output Power vs Supply Voltage (2.0 BTL Mode) Figure 18 With 4 ω Load on Typical 2 Layer PCB Device May Be Thermally Limited Above 20 V Total Harmonic Distortion + Noise vs Output Power (2.0 BTL Mode) Figure 19 Total Harmonic Distortion + Noise vs Output Power (2.0 BTL Mode) Figure 20 Total Harmonic Distortion + Noise vs Output Power (2.0 BTL Mode) Figure 21 Total Harmonic Distortion vs Frequency (2.0 BTL Mode) Figure 22 Total Harmonic Distortion vs Frequency (2.0 BTL Mode) Figure 23 Total Harmonic Distortion vs Frequency (2.0 BTL Mode) Figure 24 Efficiency vs Output Power (2.0 BTL Mode) Figure 25 Crosstalk vs Frequency (2.0 BTL Mode) Figure 26 Crosstalk vs Frequency (2.0 BTL Mode) Figure 27 Crosstalk vs Frequency (2.0 BTL Mode) Figure 28 Crosstalk vs Frequency (2.0 BTL Mode) Figure 29 Power vs Supply Voltage (2.0 BTL Mode) Figure 30 Idle Channel Noise vs Supply Voltage (2.0 BTL Mode) Figure 31 64 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: TAS5731M |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |