TAS5731MPHPR datasheet(45/81 Pages) TI1

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TAS5731M

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SLOS838C – JULY 2013 – REVISED AUGUST 2015

Table 3. Serial Control Interface Register Summary (continued)

NO. OF

SUBADDRESS

CONTENTS(1)

INITIALIZATION VALUE

BYTES

0x5E

pseudo_ch2 BQ[0]

u[31:26], b0[25:0]

0x0080 0000

u[31:26], b1[25:0]

0x0000 0000

u[31:26], b2[25:0]

0x0000 0000

u[31:26], a1[25:0]

0x0000 0000

u[31:26], a2[25:0]

0x0000 0000

0x5F

Reserved(2)

0x60

Channel 4 (subchannel)

Ch 4 output mixer[1]

0x0000 0000

output mixer

Ch 4 output mixer[0]

0x0080 0000

0x61

Channel 4 (subchannel)

Ch 4 input mixer[1]

0x0040 0000

input mixer

Ch 4 input mixer[0]

0x0040 0000

0x62

IDF post scale

Post-IDF attenuation register

0x0000 0080

0x63–0xF7

Reserved(2)

0x0000 0000

0xF8

Device address enable

Write F9 A5 A5 A5 in this register to enable write to

0x0000 0000

device address update (0xF9)

0xF9

Device address Update

u[31:8], New Dev Id[7:1] , ZERO[0] (New Dev Id

0X0000 0036

(7:1) defines the new device address

0xFA–0xFF

Reserved(2)

0x0000 0000

All DAP coefficients are 3.23 format unless specified otherwise.

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