MEC1322 datasheet(13/456 Pages) MICROCHIP

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DS00001719D-page 13

MEC1322

1.3.2

POR GLITCH PROTECTED PINS

All pins in the MEC1322 have POR output glitch protection. POR output glitch protection ensures that pins will have a

steady-state output during VCC1 POR.

In addition, signals in Table 1-4 have additional drive low POR circuitry. Signals in Table 1-4 refer to Pin Reference Num-

bers as defined in Table 1-1.

These pins are anti-glitch, driven low on VCC1 POR.

TABLE 1-4:

GLITCH PROTECTED POR DRIVE LOW PINS

The following signals require a pull-down on the board:

• nRESET_OUT/GPIO121

• GPIO143/RSMRST#

1.3.3

NON BACKDRIVE PROTECTED PINS

Table 1-5 lists pins which do not have backdrive protection. Signals in Table 1-5 refer to Pin Reference Numbers as

defined in Table 1-1.

These pins have no backdrive protection. If VCC1 is off must insure that none of these pins is above 0V to prevent back-

drive onto the VCC1 supply.

Note:

The GPIO025/I2C3_DAT0 pin is driven low, glitch free, while VCC1 is coming up. However, after VCC1 is

up and stable, the pin becomes an input (i.e., tri-stated Open Drain type), as shown in Table 1-37, “Multi-

plexing Table (16 of 18),” on page 36.

Note:

These glitch protected pins have no backdrive protection. See Section 1.3.3, "Non Backdrive Protected

Pins".

Pin Reference

Number

Pin Name

nRESET_OUT/GPIO121

VCC1_RST#/GPIO131

GPIO143/RSMRST#

125

GPIO025/I2C3_DAT0

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