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MEC1322 数据表(PDF) 14 Page - Microchip Technology

部件名 MEC1322
功能描述  Keyboard and Embedded Controller for Notebook PC
PDF  456 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MEC1322 数据表(HTML) 14 Page - Microchip Technology

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MEC1322
DS00001719D-page 14
 2014 - 2015 Microchip Technology Inc.
TABLE 1-5:
NON BACKDRIVE PROTECTED PINS
1.4
Pin Description
1.4.1
OVERVIEW
The following tables describe the signal functions in the MEC1322 pin configuration. See Section 1.6, "Notes for Tables
in this Chapter," on page 39 for notes that are referenced in the Pin Description tables.
1.4.2
HOST INTERFACE
TABLE 1-6:
HOST INTERFACE
Pin Reference
Number
Pin Name
38
ADC4/GPIO062
39
ADC3/GPIO061
42
ADC2/GPIO060
43
ADC1/GPIO057
44
ADC0/GPIO056
46
LAD0/GPIO112
48
LAD1/GPIO114
50
LAD2/GPIO113
51
LAD3/GPIO111
52
LFRAME#/GPIO120
53
LRESET#/GPIO116
54
PCI_CLK/GPIO117
55
CLKRUN#/GPIO014
57
SER_IRQ/GPIO115
60
nRESET_OUT/GPIO121
69
XTAL2
71
XTAL1
77
VCC1_RST#/GPIO131
79
VREF_PECI
80
GPIO132/PECI_DAT
85
GPIO143/RSMRST#
125
GPIO025/I2C3_DAT0
HOST INTERFACE
(11 Pins)
Pin Ref. Number
Signal Name
Description
Notes
57
SER_IRQ
Serial IRQ
Note 1
53
LRESET#
LPC Reset. LRESET# is the same as the
system PCI reset, PCIRST#
54
PCI_CLK
PCI Clock
52
LFRAME#
Frame signal. Indicates start of new cycle and
termination of broken cycle
46
LAD0
LPC Multiplexed command, address and data
bus Bit 0.
Note 1
48
LAD1
LPC Multiplexed command, address and data
bus Bit 1.
Note 1
50
LAD2
LPC Multiplexed command, address and data
bus Bit 2.
Note 1
51
LAD3
LPC Multiplexed command, address and data
bus Bit 3.
Note 1
55
CLKRUN#
PCI Clock Control
76
nEC_SCI
Power Management Event
123
nSMI
SMI Output



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