L9663 datasheet(7/104 Pages) STMICROELECTRONICS

7 / 104 page

DocID028693 Rev 1

7/104

L9663

Overall description

103

1.2

Main functionality

The transceiver IC can be used in two different modes (Mode 1 or Mode 2)(a) . The system

configuration called Mode 1 performs the decoding effort of sensor signals in the IC. The

system configuration called Mode 2 is a frontend to a PSI5 decoder contained in an external

device (typically a μC with a dedicated module).

The transceiver IC can monitor all internally generated relevant voltages, such as VSYNCx

VAS and V_PSIx.

The PSI5 interfaces inside the IC are supplied by a separate input pin VAS. If only

asynchronous mode is required, the VAS voltage is sufficient for the sensor power supply.

When synchronous mode is required, a higher voltage than VAS is needed in order to

generate the synchronous pulses. This voltage VSYNCx is generated by a dedicated

bootstrap circuit for each channel.

For direct supply from battery, the transceiver IC includes a VAS pre-regulator supplied by

VASSUP-pin: the pre-regulator can drive an external FET to regulate the VAS voltage to

7.6 V or 5.3 V. In case of low voltage level at VASSUP, an integrated charge pump is

implemented, with supply from VASSUP.

The internal analog and digital circuits are supplied by VB. The external voltage on VDD pin

is used to supply the digital output pins; VDD pin can be used to switch the digital outputs

from 5 V output level (default) to 3.3 V output level.

The PSI5 transceiver is functional in the whole VDD, VB, VASSUP and VAS power supply

range.

The internal voltage supplies (VSYNCx) are automatically activated by the transceiver IC

depending on the operating mode whenever they are needed.

Each transceiver interface can be activated and deactivated by an SPI command. At start-

up, the interfaces are off by default.

The communication interface block includes two different interfaces. In mode 1, SPI is used

for data transfer. In mode 2, the direct interface is used. The data from and to the sensors

will be transmitted bit-wise between the transceiver IC and the μC. The data evaluation and

error handling for frame errors will be done in the PSI5 controller which is integrated in the

μC.

Transceiver 1 and 2 supply the sensors and generate the synchronous pulses for

synchronous data transfer (if required) from the sensors to the transceiver and for data

transfer from the ECU to the sensors.

A data transfer from the ECU to the sensors can be performed:



by using sync pulses with different duration (PSI5 2.x standard)



by masking of sync pulses (PSI5 1.3 and 2.x standard)

The sync pulse trigger can be generated by an SPI command, by a dedicated pin (for

connection to the Synchronous Pulse Output Block included in the microcontroller) or by an

integrated automatic timer.

a. Mode 1 and Mode 2 are two system architectures which relate on the way L9663 communicates with the

microcontroller. Depending on the chosen architecture, the μC must configure the IC with the correct setup.

L9663 数据表(PDF) 7 Page - STMicroelectronics

L9663 数据表(HTML) 7 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载