L9663 datasheet(38/104 Pages) STMICROELECTRONICS

38 / 104 page

Satellite interface

L9663

38/104

DocID028693 Rev 1

is compliant to PSI5 standard (short pulse only) if the duration of the trigger is shorter than

5μs.(f)

Figure 21. Short (in case 1 μs < tw < 5 μs) Sync Pulse trigger, compliant to PSI5

standard

3.7

Safety concepts

The IC design is optimized concerning functional safety requirements, thanks to the

following implementations.

3.7.1

Voltage monitoring check

Internal and external voltage critical monitoring structures are automatically tested run-time

while the device is operated. This feature covers the voltage monitors on:



VINTA/D (under/over voltage monitoring)



GNDD loss



VAS (under/over voltage monitoring)



VASSUP over voltage for charge pump disable



VB over voltage for bootstrap disable



PSIx under voltage



PSIx over-temperature

The tests automatically running can highlight a condition of real fault on the application or a

fault within the IC.

3.7.2

Sensor data consistency

Sensor data handling implements a particular safe concept intended to work with the SPI

formats related to passive restraint application (i.e. 10-bit to 16-bit payloads): SID bits and G

bit.

A 5-bit code (SID) can be used to identify sensor data. The external MCU can program a

SID via SPI to be associated to each time slot of a physical interface. When the MCU

performs a sensor data read operation via SPI, the L9663 returns the SID code to the MCU,

along with the requested sensor data, for the MCU to check.

For sync pulse triggering via pin see errata n.1822, Section 7: Errata.

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