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L9663 数据表(PDF) 71 Page - STMicroelectronics |
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L9663 数据表(HTML) 71 Page - STMicroelectronics |
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71 / 104 page ![]() DocID028693 Rev 1 71/104 L9663 Communication interface 103 TSM2_ESn, n=1…6 (PROG) Time Slot Monitoring Channel 2, Earliest Start of Slot n Address: 100101 (TSM1_ES1) .. 101010 (TSM1_ES6) Type: R/W Description: default values: TSM2_TES1=0x002c, TSM2_TES2=0x00b5, TSM2 _TES3=0x8149, TSM2_ES4,5,6= 0x8000. TSM2_END (PROG) Time Slot Monitoring Channel 2, End of last Slot Address: 101011 Type: R/W Description: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Default value: 1000000000000000 R/W [15] PAR: Odd parity bit for register bits [15:0] [14:12] RESERVED [11:0] ST_CH2_n: Start time of time slot n on PSI5 channel 2 The start time for the given time slot after the rising edge of the SYNC pulse Steps of 1 μs 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Default value: 1000000111101100 R/W [15] PAR: Odd parity bit for register bits [15:0] [14:12] RESERVED [11:0] ET_CH2_n: End time of time slot on PSI5 channel 2 The end time of the last given slot after the rising edge of the SYNC pulse Steps of 1 μs |
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