L9663 datasheet(36/104 Pages) STMICROELECTRONICS

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Satellite interface

L9663

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DocID028693 Rev 1

Besides if a new trigger is sent while the buffer is busy, again the command is ignored and

the fault bit is set.

The buffer register can be reset by writing 0x00FF for channel 1 (respectively 0xFF00 for

channel 2) to the SPI register DCR. After such a reset, the module will flag that it is ready for

new data.

The behaviour of the sync pulse trigger generator then depends on the configuration of the

transceiver IC:



In PSI5 1.3 and 2.x mode (tooth gap method), it will mask out (i.e. ignore) the incoming

sync pulse trigger if the bit is '0'. The resulting gap is defined to be a '0' in the ECU-to-

sensor communication.



In PSI5 2.x mode (pulse length method), it will generate a long sync pulse if the bit is '1'

and a standard sync pulse otherwise.

The transceiver IC provides a transparent interface for ECU-to-sensor communication. This

means that any data in the upstream data buffer will directly be transmitted onto the PSIx

interface. The CRC calculation and data layer handling are done by the microcontroller.

3.5

Trigger pulse generator for synchronous pulses

This module generates the trigger signals for the transceiver interfaces. It has the following

sub-modules:



SPI-programmable sync pulse timer



SPI command triggering



2 pins named SYNC1, SYNC2

The module contains the sync pulse trigger generators (one for each transceiver).

Basic features:



Generates the sync pulse trigger at the configured time intervals



Generates the sync pulse trigger upon the corresponding command via SPI or discrete

SYNCx pins.

The trigger pulse generator generates the trigger signal which the sync pulse generator

uses as its input.

The trigger pulse generator has five different configurations, which can be properly selected

via SPI command:



Triggering via SPI without upstream data buffer. The microcontroller sends the

corresponding SPI command for a sync pulse. The sync pulse trigger generator then

internally generates the appropriate sync pulses, based on the specific SPI command

sent.



Triggering via SPI with upstream data buffer. The microcontroller sends the

corresponding SPI command for a sync pulse. Then the sync pulse trigger generator

internally generates the appropriate sync pulses, depending on the value in the

upstream data buffer.



Triggering via SYNCx pins without upstream data buffer. When the SYNCx pin is

triggered, the sync pulse trigger generator internally generates the appropriate sync

pulses, based on the type of trigger (length) received on the input pin.

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