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VS6663CD 数据表(PDF) 50 Page - STMicroelectronics |
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VS6663CD 数据表(HTML) 50 Page - STMicroelectronics |
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50 / 64 page ![]() Electrical characteristics VS6663CD 50/64 Doc ID027033 Rev 2 7.4 System clock - EXTCLK 7.5 Power down control - XSHUTDOWN 7.6 CCI interface - SDA, SCL 7.6.1 CCI interface - DC specification Table 29. System clock - EXTCK Symbol Parameter Minimum Maximum Unit fEXTCLK Clock frequency input 6.0 - 1%(1) 1. Nominal frequencies are 6.0 to 27 MHz with a 1% centre frequency tolerance. 27 + 1%(1) MHz Leakage current 4(2) 2. With DC coupled square wave clock. 30(3) 3. With DC VDIG applied. μA Table 30. Power down control - XSHUTDOWN Symbol Parameter Minimum Typical Maximum Unit VIL Low level input voltage 0 - 0.3 VDIG V VIH High level input voltage 0.7 VDIG - VANA V Table 31. CCI interface - DC specification Symbol Parameter Minimum Maximum Unit VIL Low level input voltage 0 0.3 * VDIG V VIH High level input voltage 0.7 * VDIG VDIG V VOL Low level output voltage(1) 1. VOH not valid for CCI. 3mA drive strength 0 0.2 * VDIG V IIL Low level input current - -10 µA IIH High level input current - 10 µA |
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