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VS6663CD 数据表(PDF) 51 Page - STMicroelectronics |
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VS6663CD 数据表(HTML) 51 Page - STMicroelectronics |
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51 / 64 page  Doc ID027033 Rev 2 51/64 VS6663CD Electrical characteristics 55 7.6.2 CCI interface - timing characteristics Figure 19. CCI AC characteristics All timings are measured from either 0.3 VDIG or 0.7 VDIG. Table 32. CCI interface - timing characteristics Symbol Parameter Minimum Typical Maximum Unit tSCL SCL clock frequency 0 - 400 kHz tLOW Clock pulse width low 1.3 - - μs tHIGH Clock pulse width high 0.6 - - μs tSP Pulse width of spikes which are suppressed by the input filter 0 - 50 ns tBUF Bus free time between transmissions 1.3 - - μs tHD.STA Start hold time 0.6 - - μs tSU.STA Start set-up time 0.6 - - μs tHD.DAT Data in hold time 0 - 0.9 μs tSU.DAT Data in set-up time 100 - - ns tR SCL/SDA rise time 20+0.1 Cb(1) 1. Cb = total capacitance of one bus line in pF - 300 ns tF SCL/SDA fall time 20+0.1 Cb(1) - 300 ns tSU.STO Stop set-up time 0.6 - - μs Ci/o Input/output capacitance (SDA) - - 8 pF Cin Input capacitance (SCL) - - 6 pF SDA SCL tHD.STA tR tHIGH tF tSU.DAT tHD.DAT tSU.STA tSU.STO ... ... tHD.STA tLOW tBUF stop start stop start 0.7 VDIG 0.3 VDIG 0.3 VDIG 0.7 VDIG |
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