DP8390D datasheet(30/56 Pages) NSC

30 / 56 page

110 Initialization Procedures

(Continued)

Before receiving packets the user must specify the location

of the Receive Buffer Ring This is programmed in the Page

Start and Page Stop Registers In addition the Boundary

and Current Page Registers must be initialized to the value

of the Page Start Register These registers will be modified

during reception of packets

120 Loopback Diagnostics

Three forms of local loopback are provided on the NIC The

user has the ability to loopback through the deserializer on

the DP8390D NIC through the DP8391 SNI and to the coax

to check the link through the transceiver circuitry Because

of the half duplex architecture of the NIC loopback

testing is a special mode of operation with the follow-

ing restrictions

Restrictions During Loopback

The FIFO is split into two halves one used for transmission

the other for reception Only 8-bit fields can be fetched from

memory so two tests are required for 16-bit systems to veri-

fy integrity of the entire data path During loopback the maxi-

mum latency from the assertion of BREQ to BACK is 20 ms

Systems that wish to use the loopback test yet do not meet

this latency can limit the loopback packet to 7 bytes without

experiencing underflow Only the last 8 bytes of the loop-

back packet are retained in the FIFO The last 8 bytes can

be read through the FIFO register which will advance

through the FIFO to allow reading the receive packet se-

quentially

DESTINATION ADDRESS

(6 bytes) Station Physical Address

SOURCE ADDRESS

LENGTH

2 bytes

DATA

46 to 1500 bytes

CRC

Appended by NIC if CRC e ‘‘0’’ in TCR

When in word-wide mode with Byte Order Select set the

loopback packet must be assembled in the even byte loca-

tions as shown below (The loopback only operates with

byte wide transfers)

TLF8582 – 15

When in word-wide mode with Byte Order Select low the

following format must be used for the loopback packet

TLF8582 – 16

Note

When using loopback in word mode 2n bytes must be programmed in

TBCR0 1 Where n e actual number of bytes assembled in even or

odd location

To initiate a loopback the user first assembles the loopback

packet then selects the type of loopback using the Transmit

Configuration register bits LB0 LB1 The transmit configura-

tion register must also be set to enable or disable CRC gen-

eration during transmission The user then issues a normal

transmit command to send the packet During loopback the

receiver checks for an address match and if CRC bit in the

TCR is set the receiver will also check the CRC The last 8

bytes of the loopback packet are buffered and can be read

out of the FIFO using the FIFO read port

Loopback Modes

MODE 1 Loopback Through the Controller (LB1 e 0 LB0

If the loopback is through the NIC then the serializer is sim-

ply linked to the deserializer and the receive clock is derived

from the transmit clock

MODE 2 Loopback Through the SNI (LB1 e 1 LB0 e 0)

If the loopback is to be performed through the SNI the NIC

provides a control (LPBK) that forces the SNI to loopback

all signals

MODE 3 Loopback to Coax (LB1 e 1 LB0 e 1)

Packets can be transmitted to the coax in loopback mode to

check all of the transmit and receive paths and the coax

itself

Note

In MODE 1 CRS and COL lines are not indicated in any status regis-

ter but the NIC will still defer if these lines are active In MODE 2

COL is masked and in MODE 3 CRS and COL are not masked It is

not possible to go directly between the loopback modes it is neces-

sary to return to normal operation (00H) when changing modes

Reading the Loopback Packet

The last eight bytes of a received packet can be examined

by 8 consecutive reads of the FIFO register The FIFO

pointer is incremented after the rising edge of the CPU’s

read strobe by internally synchronizing and advancing the

pointer This may take up to four bus clock cycles if the

pointer has not been incremented by the time the CPU

reads the FIFO register again the NIC will insert wait states

Note

The FIFO may only be read during Loopback Reading the FIFO at

any other time will cause the NIC to malfunction

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