ADE7758 datasheet(58/68 Pages) AD

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ADE7758

Rev. A | Page 58 of 68

ACCESSING THE ADE7758 ON-CHIP REGISTERS

All ADE7758 functionality is accessed via the on-chip registers.

Each register is accessed by first writing to the communications

description of the serial interface protocol, see the ADE7758

Serial Interface section.

COMMUNICATIONS REGISTER

The communications register is an 8-bit, write-only register that

controls the serial data transfer between the ADE7758 and the

host processor. All data transfer operations must begin with a

write to the communications register. The data written to the

communications register determines whether the next operation

is a read or a write and which register is being accessed. Table 12

outlines the bit designations for the communications register.

Table 12. Communications Register

Bit Location

Bit Mnemonic

Description

0 to 6

A0 to A6

The seven LSBs of the communications register specify the register for the data transfer operation.

Table 13 lists the address of each ADE7758 on-chip register.

W/R

When this bit is a Logic 1, the data transfer operation immediately following the write to the

communications register is interpreted as a write to the ADE7758. When this bit is a Logic 0, the data

transfer operation immediately following the write to the communications register is interpreted as a

read operation.

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

W/R

Table 13. ADE7758 Register List

Address

[A6:A0]

Name

R/W1

Length

Default

Value

Description

0x00

Reserved

–

Reserved.

0x01

AWATTHR

Watt-Hour Accumulation Register for Phase A. Active power is accumulated over

time in this read-only register. The AWATTHR register can hold a maximum of

0.52 seconds of active energy information with full-scale analog inputs before it

overflows (see the Active Energy Calculation section). Bit 0 and Bit 1 of the

COMPMODE register determine how the active energy is processed from the six

analog inputs.

0x02

BWATTHR

Watt-Hour Accumulation Register for Phase B.

0x03

CWATTHR

Watt-Hour Accumulation Register for Phase C.

0x04

AVARHR

VAR-Hour Accumulation Register for Phase A. Reactive power is accumulated

over time in this read-only register. The AVARHR register can hold a maximum of

0.52 seconds of reactive energy information with full-scale analog inputs before

it overflows (see the Reactive Energy Calculation section). Bit 0 and Bit 1 of the

COMPMODE register determine how the reactive energy is processed from the

six analog inputs.

0x05

BVARHR

VAR-Hour Accumulation Register for Phase B.

0x06

CVARHR

VAR-Hour Accumulation Register for Phase C.

0x07

AVAHR

VA-Hour Accumulation Register for Phase A. Apparent power is accumulated

over time in this read-only register. The AVAHR register can hold a maximum of

1.15 seconds of apparent energy information with full-scale analog inputs before

it overflows (see the Apparent Energy Calculation section). Bit 0 and Bit 1 of the

COMPMODE register determine how the apparent energy is processed from the

six analog inputs.

0x08

BVAHR

VA-Hour Accumulation Register for Phase B.

0x09

CVAHR

VA-Hour Accumulation Register for Phase C.

0x0A

AIRMS

Phase A Current Channel RMS Register. The register contains the rms component

of the Phase A input of the current channel. The source is selected by data bits in

the mode register.

0x0B

BIRMS

Phase B Current Channel RMS Register.

0x0C

CIRMS

Phase C Current Channel RMS Register.

0x0D

AVRMS

Phase A Voltage Channel RMS Register.

0x0E

BVRMS

Phase B Voltage Channel RMS Register.

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