ADE7758 datasheet(38/68 Pages) AD

38 / 68 page

ADE7758

Rev. A | Page 38 of 68

ting

APCF = Watts

If watt < 0

If the active power of that phase is positive, no change is ma

to the sign of the reactive power. However, if the sign of the

active power is negative in that phase, the sign of its reactive

power is inversed before summing and creating VARCF pulses.

This mode should be used in conjunction with the absolute

value mode for active power (Bit 5 in the COMPMODE

the ABS and SAVAR bits of the COMPMODE register.

The effects of setting the ABS and SAVAR bits of the

COMPMODE register results as follows when ABS = 1

and SAVAR = 1:

If watt > 0

VARCF = VAR

APCF = |Watts|

VARCF = -VAR

INPUT TO BVARHR

INPUT TO AVARHR

INPUT TO CVARHR

INPUT TO BVAHR

INPUT TO AVAHR

INPUT TO CVAHR

VARCF

VARCFNUM[11:0]

VARCFDEN[11:0]

DFC

VACF BIT (BIT 7) OF

WAVMODE REGISTER

÷4

Figure 73. ADE7758 Reactive Power Frequency Output

The output

equency

cy conversion in the

t power.

is frequency output are similar to that

from the DFC is divided down by a pair of fr

division registers before sending to the APCF pulse output.

Namely, VARCFDEN/VARCFNUM pulses are needed at the

DFC output before the VARCF pin outputs a pulse. Under

steady load conditions, the output frequency is directly

proportional to the total reactive power.

Figure 68 illustrates the energy-to-frequen

ADE7758. Note that the input to the DFC can be selected

between the total reactive power and total apparent power.

Therefore, the VARCF pin can output frequency that is

proportional to the total reactive power or total apparen

The selection is made by setting the VACF bit (Bit 7) in the

WAVMODE register. Setting this bit to logic high switches th

input to the total apparent power. The default value of this bit is

logic low. Therefore, the default output from the VARCF pin is

the total reactive power.

All other operations of th

of the active power frequency output (see the Active Power

Frequency Output section).

Line Cycle Reactive Energy Accumulation Mode

The line cycle reactive energy accumulation mode is activated

by setting the LVAR bit (Bit 1) in the LCYCMODE register. The

total reactive energy accumulated over an integer number of

zero crossings is written to the VAR-hr accumulation registers

after the LINECYC number of zero crossings has been detected.

The operation of this mode is similar to watt-hr accumulation

(see the Line Cycle Active Energy Accumulation Mode section).

When using the line cycle accumulation mode, the RSTREAD

bit (Bit 6) of the LCYCMODE register should be set to Logic 0.

APPARENT POWER CALCULATION

Apparent power is defined as the amplitude of the vector sum of

the active and reactive powers. Figure 74 shows what is typically

referred to as the power triangle.

ACTIVE POWER

APPARENT

POWER

Figure 74. Power Triangle

There are two ways to calculate apparent power, namely the

arithmetical approach or the vectorial method. The arithmetical

method uses the product of the voltage rms value and current

rms value to calculate apparent power. Equation 22 describes

the arithmetical approach mathematically.

S = VRMS × IRMS

(22)

where S is the apparent power, and VRMS and IRMS are the

rms voltage and current, respectively.

The vectorial method uses the square root of the sum of the

active and reactive power, after the two are individually

squared. Equation 23 shows the calculation used in the vectorial

approach.

(23)

where S is the apparent power, P is the active power, and Q is

the reactive power.

ADE7758 数据表(PDF) 38 Page - Analog Devices

ADE7758 数据表(HTML) 38 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

数据表下载