TUSB7340 datasheet(2/117 Pages) TI1

2 / 117 page

TUSB7320, TUSB7340

SLLSE76M – MARCH 2011 – REVISED JULY 2015

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Table of Contents

7.4

Programming........................................................... 15

Features .................................................................. 1

7.5

Applications ........................................................... 1

Application and Implementation ........................ 95

Description ............................................................. 1

8.1

Application Information............................................ 95

Revision History..................................................... 2

8.2

Typical Application ................................................. 96

Pin Configuration and Functions ......................... 3

Power Supply Recommendations .................... 104

Specifications......................................................... 8

9.1

Power-Up and Power-Down Sequencing ............. 104

6.1

Absolute Maximum Ratings ...................................... 8

9.2

PCI Express Power Management......................... 105

6.2

ESD Ratings ............................................................ 8

Layout................................................................. 106

6.3

Recommended Operating Conditions ....................... 8

10.1

Layout Guidelines ............................................... 106

6.4

Thermal Information .................................................. 9

10.2

Layout Example .................................................. 107

6.5

3.3-V I/O Electrical Characteristics ........................... 9

Device and Documentation Support ............... 108

6.6

Input Clock Specification........................................... 9

11.1

Device Support.................................................... 108

6.7

Input Clock 1.8-V DC Characteristics ..................... 10

11.2

Documentation Support ..................................... 108

6.8

Crystal Specification................................................ 10

11.3

Community Resources........................................ 109

6.9

TUSB7320 Power Consumption ............................. 10

11.4

Related Links ...................................................... 109

6.10

TUSB7340 Power Consumption ........................... 10

11.5

Trademarks ......................................................... 109

Detailed Description ............................................ 11

11.6

Electrostatic Discharge Caution .......................... 109

7.1

Overview ................................................................. 11

11.7

Glossary .............................................................. 109

7.2

Functional Block Diagram ....................................... 11

Mechanical, Packaging, and Orderable

7.3

Feature Description................................................. 12

Information ......................................................... 109

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision L (August 2013) to Revision M

Page

•

Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional

Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device

and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1

•

Deleted from Section Clock Source Requirements part of the paragraph; -50MHz. Changed supported Crystal value

to 24MHZ and 48 MHz ........................................................................................................................................................ 14

•

Deleted the first ItemizedList under Two-Wire Serial-Bus Interface section ....................................................................... 15

•

Deleted part of sentence from Table 112. in bit row 30, description; 'with the PLL....SEL field........................................... 55

•

Deleted the Description from Table 112, in row 29:24 and replaced with Reserved also, replaced rw with w in same

row ....................................................................................................................................................................................... 55

Changes from Revision K (March 2011) to Revision L

Page

•

Added text "If a 48 MHz reference clock is used instead of a crystal, GRST# must remain asserted until the 48 MHz

clock is stable" ........................................................................................................................................................................ 5

•

Added text - "If a 48 MHz reference clock is used instead of a crystal, GRST# must remain asserted until the 48

MHz clock is stable"............................................................................................................................................................ 104

•

Replaced the Power Up Sequence image ......................................................................................................................... 104

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