数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

TUSB7340 数据表(PDF) 6 Page - Texas Instruments

Click here to check the latest version.
部件名 TUSB7340
功能描述  USB 3.0 xHCI Host Controller
PDF  117 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TUSB7340 数据表(HTML) 6 Page - Texas Instruments

Back Button TUSB7340 Datasheet HTML 2Page - Texas Instruments TUSB7340 Datasheet HTML 3Page - Texas Instruments TUSB7340 Datasheet HTML 4Page - Texas Instruments TUSB7340 Datasheet HTML 5Page - Texas Instruments TUSB7340 Datasheet HTML 6Page - Texas Instruments TUSB7340 Datasheet HTML 7Page - Texas Instruments TUSB7340 Datasheet HTML 8Page - Texas Instruments TUSB7340 Datasheet HTML 9Page - Texas Instruments TUSB7340 Datasheet HTML 10Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 117 page
background image
TUSB7320, TUSB7340
SLLSE76M – MARCH 2011 – REVISED JULY 2015
www.ti.com
Clock and Reset Signals (continued)
PIN
I/O
DESCRIPTION
TUSB7320
TUSB7340
NAME
NO.
NO.
USB SuperSpeed receiver differential pair (negative).
USB_SSRXN_DN2
A10
A10
I
Note: When routing, it is permissible to swap the positive and negative signals in Port 2 SSRX
differential pair.
USB_DP_DN2
B12
B12
I/O
USB High-speed differential transceiver (positive).
USB_DM_DN2
A13
A13
I/O
USB High-speed differential transceiver (negative).
USB DS Port 2 Power On Control for Downstream Power. The terminal is used for control of the
O
PWRON2#
B34
B34
downstream power switch. If the PWRON_POLARITY bit is set to 1, this pin is active high and the
PD
internal pulldown is disabled. This pin may be at low impedance when power rails are removed.
USB DS Port 2 Overcurrent Detection.
I
OVERCUR2#
A37
A37
0: overcurrent detected;
PU
1: overcurrent not detected
USB SuperSpeed transmitter differential pair (positive).
USB_SSTXP_DN3
—
B28
O
Note: When routing, it is permissible to swap the positive and negative signals in Port 3 SSTX
differential pair.
USB SuperSpeed transmitter differential pair (negative).
USB_SSTXN_DN3
—
A30
O
Note: When routing, it is permissible to swap the positive and negative signals in Port 3 SSTX
differential pair.
USB SuperSpeed receiver differential pair (positive).
USB_SSRXP_DN3
—
B27
I
Note: When routing, it is permissible to swap the positive and negative signals in Port 3 SSRX
differential pair.
USB SuperSpeed receiver differential pair (negative).
USB_SSRXN_DN3
—
A29
I
Note: When routing, it is permissible to swap the positive and negative signals in Port 3 SSRX
differential pair.
USB_DP_DN3
—
B25
I/O
USB High-speed differential transceiver (positive).
USB_DM_DN3
—
A27
I/O
USB High-speed differential transceiver (negative).
USB DS Port 3 Power On Control for Downstream Power. The terminal is used for control of the
O
PWRON3#
—
A46
downstream power switch. If the PWRON_POLARITY bit is set to 1, this pin is active high and the
PD
internal pulldown is disabled. This pin may be at low impedance when power rails are removed.
USB DS Port 3 Overcurrent Detection.
I
OVERCUR3#
—
B43
0: overcurrent detected;
PU
1: overcurrent not detected
USB SuperSpeed transmitter differential pair (positive).
USB_SSTXP_DN4
—
B7
O
Note: When routing, it is permissible to swap the positive and negative signals in Port 4 SSTX
differential pair.
USB SuperSpeed transmitter differential pair (negative).
USB_SSTXN_DN4
—
A8
O
Note: When routing, it is permissible to swap the positive and negative signals in Port 4 SSTX
differential pair.
USB SuperSpeed receiver differential pair (positive).
USB_SSRXP_DN4
—
B6
I
Note: When routing, it is permissible to swap the positive and negative signals in Port 4 SSRX
differential pair.
USB SuperSpeed receiver differential pair (negative).
USB_SSRXN_DN4
—
A7
I
Note: When routing, it is permissible to swap the positive and negative signals in Port 4 SSRX
differential pair.
USB_DP_DN4
—
B5
I/O
USB High-speed differential transceiver (positive).
USB_DM_DN4
—
A5
I/O
USB High-speed differential transceiver (negative).
USB DS Port 4 Power On Control for Downstream Power. The terminal is used for control of the
O
PWRON4#
—
A48
downstream power switch. If the PWRON_POLARITY bit is set to 1, this pin is active high and the
PD
internal pulldown is disabled. This pin may be at low impedance when power rails are removed.
USB DS Port 4 Overcurrent Detection.
I
OVERCUR4#
—
B45
0: overcurrent detected;
PU
1: overcurrent not detected
I2C SIGNALS
SCL
B2
B2
I/O
I2C Clock - If no I2C device is present, pull this line down to disable.
SDA
A2
A2
I/O
I2C Data - If no I2C device is present, pull this line down to disable.
TEST AND MISCELLANEOUS SIGNALS
I
JTAG_TCK
A32
A32
JTAG test clock
PD
I
JTAG_TDI
A35
A35
JTAG test data in
PU
O
JTAG_TDO
B31
B31
JTAG test data out
PD
6
Submit Documentation Feedback
Copyright © 2011–2015, Texas Instruments Incorporated
Product Folder Links: TUSB7320 TUSB7340



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com