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TUSB7340 数据表(PDF) 33 Page - Texas Instruments |
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TUSB7340 数据表(HTML) 33 Page - Texas Instruments |
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33 / 117 page  TUSB7320, TUSB7340 www.ti.com SLLSE76M – MARCH 2011 – REVISED JULY 2015 7.5.1.27 Power Management Data Register This read-only register is not applicable to the TUSB73X0 and returns 00h when read. PCI register offset: 47h Register type: Read-only Default value: 00h Table 40. PCI Register 47h Bit No. 7 6 5 4 3 2 1 0 Reset State 0 0 0 0 0 0 0 0 7.5.1.28 MSI Capability ID Register This read-only register identifies the linked list item as the register for Message Signaled Interrupts Capabilities. The register returns 05h when read. PCI register offset: 48h Register type: Read-only Default value: 05h Table 41. PCI Register 48h Bit No. 7 6 5 4 3 2 1 0 Reset State 0 0 0 0 0 1 0 1 Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 33 Product Folder Links: TUSB7320 TUSB7340 |
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