数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

TVP7002IPZP 数据表(PDF) 45 Page - Texas Instruments

部件名 TVP7002IPZP
功能描述  TRIPLE 8-/10-BIT 165-/110-MSPS VIDEO AND GRAPHICS DIGITIZER WITH HORIZONTAL PLL
PDF  58 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TVP7002IPZP 数据表(HTML) 45 Page - Texas Instruments

Back Button TVP7002IPZP Datasheet HTML 41Page - Texas Instruments TVP7002IPZP Datasheet HTML 42Page - Texas Instruments TVP7002IPZP Datasheet HTML 43Page - Texas Instruments TVP7002IPZP Datasheet HTML 44Page - Texas Instruments TVP7002IPZP Datasheet HTML 45Page - Texas Instruments TVP7002IPZP Datasheet HTML 46Page - Texas Instruments TVP7002IPZP Datasheet HTML 47Page - Texas Instruments TVP7002IPZP Datasheet HTML 48Page - Texas Instruments TVP7002IPZP Datasheet HTML 49Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 45 / 58 page
background image
TVP7002
www.ti.com
SLES206C – MAY 2007 – REVISED APRIL 2013
RGB Coarse Clamp Control
Subaddress
2Fh
(Default 8Ch)
7
6
5
4
3
2
1
0
Reserved
RGB leakage [5:0]
RGB leakage [5:0]: RGB channel coarse clamp leakage current switch. Increasing the coarse clamp leakage current increases horizontal
droop but improves hum rejection.
00h = 0.5
μA
0Ch = 6.5
μA when IBIAS = 2 μA (default)
3Fh = 32.0
μA when IBIAS = 2 μA
Droop_Current = 0.5 + (IBIAS/4) × NDC, where 0 ≤ NDC ≤ 63
SOG Coarse Clamp Control
Subaddress
30h
(Default 04h)
7
6
5
4
3
2
1
0
Reserved
SOG leakage [5:0]
SOG leakage [5:0]: SOG coarse clamp leakage current switch. The SOG coarse clamp leakage current is derived from the bias current.
Increasing the coarse clamp leakage current increases horizontal droop but improves hum rejection.
00h = 0.01
μA
04h = 0.21
μA when IBIAS = 2 μA (default)
3Fh = 3.16
μA when IBIAS = 2 μA
Droop_Current = (0.01 + (IBIAS/40) × NDC, where 0 ≤ NDC ≤ 63
NOTE: IBIAS is controlled using Trim clamp [3:0] at subaddress 2Ch.
ALC Placement
Subaddress
31h
(Default 5Ah)
7
6
5
4
3
2
1
0
ALC placement [7:0]
ALC placement [7:0]: Positions the ALC signal an integer number of clock periods after either the leading edge or the trailing edge (default)
of the HSYNC signal. Bit 3 of subaddress 15h allows selecting which edge of HSYNC is used as the timing reference for ALC placement.
The ALC must be applied after the end of the fine clamp interval.
0 = Minimum setting
18h = PC graphics and SDTV with bi-level syncs
5Ah = HDTV with tri-level syncs (default)
Reserved
Subaddress
32h
Default (18h)
7
6
5
4
3
2
1
0
Reserved [7:0]
Reserved
Subaddress
33h
Default (60h)
7
6
5
4
3
2
1
0
Reserved
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
45
Product Folder Links: TVP7002



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com