TVP7002IPZP datasheet(9/58 Pages) TI1

部件名	TVP7002IPZP

功能描述	TRIPLE 8-/10-BIT 165-/110-MSPS VIDEO AND GRAPHICS DIGITIZER WITH HORIZONTAL PLL

PDF	58 Pages

Scroll/Zoom	100%

制造商	TI1 [Texas Instruments]

网页	http://www.ti.com

标志

9 / 58 page

DATACLK

Valid Data

R, G, B, HSOUT

Valid Data

CLK POL = 0

CLK POL = 1

TVP7002

www.ti.com

SLES206C – MAY 2007 – REVISED APRIL 2013

Timing Requirements

PARAMETER

TEST CONDITIONS(1)

MIN

TYP

MAX

UNIT

Clocks, Video Data, Sync Timing

Positive duty cycle, DATACLK (CLK POL = 0)

Positive duty cycle, DATACLK (CLK POL = 1)

DATACLK rise time

10% to 90%

DATACLK fall time

90% to 10%

t3 (RGB data)

RGB output delay time

1.5

(1)

Measured at 162 MHz with 22-

Ω series termination resistor and 10-pF load. Specified by characterization only. Data is clocked out on

the rising edge of DATACLK with Reg 18h CLK POL=0 and is clocked out on the falling edge of DATACLK with CLK POL=1.

Figure 1. Clock, Video Data, and HSOUT Timing

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TVP7002IPZP 数据表(PDF) 9 Page - Texas Instruments