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LSM6DS0 数据表(PDF) 47 Page - STMicroelectronics |
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LSM6DS0 数据表(HTML) 47 Page - STMicroelectronics |
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47 / 59 page ![]() DocID025604 Rev 3 47/59 LSM6DS0 Register description 59 7.24 CTRL_REG7_XL (21h) Linear acceleration sensor control register 7. 7.25 CTRL_REG8 (22h) Control register 8. Table 65. CTRL_REG7_XL register HR DCF1 DCF0 0(1) 1. These bits must be set to ‘0’ for the correct operation of the device 0(1) FDS 0(1) HPIS1 Table 66. CTRL_REG7_XL register description HR High resolution mode for accelerometer enable. Default value: 0 (0: disabled; 1: enabled). Refer to Table 67. DCF[1:0] Accelerometer digital filter (high-pass and low-pass) cutoff frequency selection: the band- width of the high-pass filter depends on the selected ODR. Refer to Table 67. FDS Filtered data selection. Default value: 0 (0: internal filter bypassed; 1: data from internal filter sent to output register and FIFO) HPIS1 High-pass filter enabled for acceleration sensor interrupt function on interrupt. Default value: 0 (0: filter bypassed; 1: filter enabled) Table 67. Low pass cut-off frequency in high resolution mode (HR = 1) HR CTRL_REG7 (DCF [1:0]) LP cutoff freq. [Hz] 1 00 ODR/50 1 01 ODR/100 1 10 ODR/9 1 11 ODR/400 Table 68. CTRL_REG8 register BOOT BDU H_LACTIVE PP_OD SIM IF_ADD_INC BLE SW_RESET |
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