LSM330 datasheet(44/75 Pages) STMICROELECTRONICS

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LSM330

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8.3

CTRL_REG5_A (20h)

Linear acceleration sensor control register 5 (r/w)

ODR [3:0] is used to set power mode, ODR selection. The following table lists all

frequencies available.

The BDU bit is used to inhibit the update of the output registers until both upper and lower

registers are read. In default mode (BDU=’0’) the output register values are updated

continuously. If for any reason it is not sure to read faster than the output data rate it is

recommended to set the BDU bit to ‘1’. In this way the content of output register is not

updated until both MSB and LSB are read, avoiding to read values related to different

sample times.

Table 21. CTRL_REG5_A register

ODR3

ODR2

ODR1

ODR0

BDU

ZEN

YEN

XEN

Table 22. CTRL_REG5_A register description

ODR [3:0]

Output data rate & power mode selection. Default value:0000 (see Table 23)

BDU

Block Data Update. Default value: 0

0:continuous update,1:output registers not updated until MSB and LSB read

Zen

Z-axis enable. Default value: 1

(0: Z-axis disabled; 1: Z-axis enabled)

Yen

Y-axis enable. Default value:1

(0:Y axis disabled; 1: Y-axis enabled)

Xen

X-axis enable. Default value:1

(0: X-axis disabled;1: X-axis enabled)

Table 23. CTRL_REG5_A output data rate selection

ODR3

ODR2

ODR1

ODR0

ODR selection

0000

Power-down

0001

3.125 Hz

0010

6.25 Hz

0011

12.5 Hz

010025 Hz

010150 Hz

0110

100 Hz

0111

400 Hz

1000

800 Hz

1001

1600 Hz

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