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STGAP1STR 数据表(PDF) 11 Page - STMicroelectronics |
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STGAP1STR 数据表(HTML) 11 Page - STMicroelectronics |
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11 / 67 page ![]() DocID027190 Rev 3 11/67 STGAP1S Electrical data 67 3 Electrical data 3.1 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Test condition Min. Max. Unit dVISO/dt Common mode transient immunity VCM = 1500 V 50 V/ns VDD Integrated 3.3 V voltage regulator input voltage vs. GND -0.30 6.50 V VREG Integrated 3.3 V voltage regulator output voltage vs. GND -0.30 3.60 V VREG_ISO Isolated logic supply voltage vs. GNDISO -0.30 3.60 V VLOGIC Logic pins voltage vs. GND -0.30 VDD + 0.30 V VHL Differential supply voltage (VH vs. VL) -0.30 40 V VH Positive supply voltage (VH vs. GNDISO) -0.30 40 V VL Negative supply voltage (VL vs. GNDISO) -15 0.30 V VOUT Voltage on gate driver outputs (GON, GOFF, CLAMP vs. VL) VL - 0.30 VH + 0.30 V VDESAT Voltage on DESAT pin vs. GNDISO -0.30 VH + 0.30 V VSENSE Voltage on SENSE pin vs. GNDISO -2 (VH + 0.30, 20)min V VCECLAMP Voltage on VCECLAMP pin vs. VL VL - 0.30 VH + 0.30 V VASC Voltage on ASC pin vs. GNDISO -0.30 VH + 0.30 V IDIAGx Open drain DC output current VDIAGx < 0.8 V 20 mA VDIAGx Open drain output voltage -0.30 6.50 V TJ Junction temperature -40 150 °C TS Storage temperature -50 150 °C TA Ambient temperature -40 125 °C PDin Power dissipation input chip fsw = 1 MHz 65 mW PDout Power dissipation output chip (TJ,max - TA)/Rth(JA) - PDin W dH/dt Magnetic field immunity 100 A/(m·s) ESD Human body model 2 kV |
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