STGAP1STR datasheet(29/67 Pages) STMICROELECTRONICS

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STGAP1S

Functional description

7.3

Hardware RESET

The device can be reset by forcing the VREG pin to ground through an external switch.

The internal regulator is designed to stand this condition.

The maximum current required to force the VREG pin to ground is indicated by the

parameter IREG.

7.4

Power supply UVLO and OVLO

Undervoltage protection is available on both VH and VL supply pins.

The turn-on threshold can be programmed through the SPI writing the CFG4 register.

A fixed 1 V hysteresis will set the respective turn-off threshold.

Both UVLO protections can be independently disabled by setting the proper value in the

CFG4 register.

When VH voltage goes below the VHoff threshold the output buffer goes in “safe state” and

the UVLOH status flag is forced high. If the UVLOlatch bit in the CFG4 register is set low

(default), the UVLOH status flag is released when VH voltage reaches the VHon threshold

and the device returns to normal operation.

Otherwise the UVLOH flag is latched and the device remains in “safe state” until the VH

voltage reaches the VHon threshold and the flag is released. See Section 7.11 on page 35

for indication on how the failure flags can be released.

When VL voltage goes over the VLoff threshold the output buffer goes in “safe state” and the

UVLOL status flag is forced high. If the UVLOlatch bit in the CFG4 register is set low

(default), the UVLOL status flag is released when VL voltage goes below the VLon threshold

and the device returns to normal operation.

Otherwise the UVLOL flag is latched and the device remains in “safe state” until the VL

voltage goes below the VLon threshold and the flag is released. See Section 7.11 for

indication on how the failure flags can be released.

Overvoltage protection is available on both VH and VL supply pins. Both OVLO protections

can be disabled by setting the proper value in the CFG4 register.

When the VH voltage goes over the OVVHoff threshold the output buffer goes in “safe state”

and the OVLOH status flag is forced high. The OVLOH flag is latched and the device

remains in “safe state” until VH voltage goes below the overvoltage threshold and the flag is

released. See Section 7.11 for indication on how the failure flags can be released.

When VL voltage goes over the OVVLoff threshold the output buffer goes in “safe state” and

the OVLOL status flag is forced high. The OVLOL flag is latched and the device remains in

“safe state” until VH voltage goes below the overvoltage threshold and the flag is released.

See Section 7.11 for indication on how the failure flags can be released.

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