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STM8TL52X4 数据表(PDF) 9 Page - STMicroelectronics |
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STM8TL52X4 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 84 page ![]() DocID022344 Rev 7 9/84 STM8TL52x4 STM8TL53x4 Description 25 2 Description The STM8TL52x4 and STM8TL53x4 devices feature the enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations. It uses a ProxSense charge transfer capacitive acquisition method that is capable of near range proximity detection. The family includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive in-application debugging and ultrafast Flash programming. All STM8TL52x4 and STM8TL53x4 microcontrollers feature low-power low-voltage single- supply program Flash memory. The STM8TL52x4 and STM8TL53x4 devices are based on a generic set of state-of-the-art peripherals. The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, and simplified even more by the use of a common set of development tools. |
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