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STM32L162VC 数据表(PDF) 85 Page - STMicroelectronics

部件名 STM32L162VC
功能描述  Ultra-low-power platform
PDF  123 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32L162VC 数据表(HTML) 85 Page - STMicroelectronics

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STM32L162VC, STM32L162RC
104
6.3.16
Communications interfaces
I2C interface characteristics
The device I2C interface meets the requirements of the standard I2C communication
protocol with the following restrictions: SDA and SCL are not “true” open-drain I/O pins.
When configured as open-drain, the PMOS connected between the I/O pin and VDD is
disabled, but is still present.
The I2C characteristics are described in Table 48. Refer also to Section 6.3.13: I/O port
characteristics for more details on the input/output ction characteristics (SDA and SCL).
Table 48. I2C characteristics
Symbol
Parameter
Standard mode
I2C(1)(2)
1. Guaranteed by design.
Fast mode I2C(1)(2)
2. fPCLK1 must be at least 2 MHz to achieve standard mode I²C frequencies. It must be at least 4 MHz to
achieve fast mode I²C frequencies. It must be a multiple of 10 MHz to reach the 400 kHz maximum I²C fast
mode clock.
Unit
Min
Max
Min
Max
tw(SCLL)
SCL clock low time
4.7
-
1.3
-
µs
tw(SCLH)
SCL clock high time
4.0
-
0.6
-
tsu(SDA)
SDA setup time
250
-
100
-
ns
th(SDA)
SDA data hold time
-
3450(3)
-900(3)
3. The maximum Data hold time has only to be met if the interface does not stretch the low period of SCL
signal.
tr(SDA)
tr(SCL)
SDA and SCL rise time
-
1000
-
300
tf(SDA)
tf(SCL)
SDA and SCL fall time
-
300
-
300
th(STA)
Start condition hold time
4.0
-
0.6
-
µs
tsu(STA)
Repeated Start condition
setup time
4.7
-
0.6
-
tsu(STO)
Stop condition setup time
4.0
-
0.6
-
μs
tw(STO:STA)
Stop to Start condition time
(bus free)
4.7
-
1.3
-
μs
Cb
Capacitive load for each bus
line
-
400
-
400
pF
tSP
Pulse width of spikes that
are suppressed by the
analog filter
050(4)
4. The minimum width of the spikes filtered by the analog filter is above tSP(max).
050(4)
ns



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