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STM32F769AI 数据表(PDF) 178 Page - STMicroelectronics

部件名 STM32F769AI
功能描述  Dual mode Quad-SPI
PDF  255 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F769AI 数据表(HTML) 178 Page - STMicroelectronics

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Electrical characteristics
STM32F765xx STM32F767xx STM32F768Ax STM32F769xx
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DocID029041 Rev 4
Figure 45. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
5.3.29
Communications interfaces
I2C interface characteristics
The I2C interface meets the timings requirements of the I2C-bus specification and user
manual rev. 03 for:
Standard-mode (Sm): with a bit rate up to 100 kbit/s
Fast-mode (Fm): with a bit rate up to 400 kbit/s.
Fast-mode Plus (Fm+): with a bit rate up to 1Mbit/s.
The I2C timings requirements are guaranteed by design when the I2C peripheral is properly
configured (refer to RM0410 reference manual) and when the I2CCLK frequency is greater
than the minimum shown in the table below:
Table 83. Minimum I2CCLK frequency in all I2C modes
Symbol
Parameter
Condition
Min
Unit
f(I2CCLK)
I2CCLK
frequency
Standard-mode
2
MHz
Fast-mode
Analog filter ON
DNF=0
8
Analog filter OFF
DNF=1
9
Fast-mode Plus
Analog filter ON
DNF=0
16
Analog filter OFF
DNF=1
16



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